4e5f11e0b9
This is the last sync with LEDE Project dts files before 11.0. Obtained from: LEDE Project Sponsored by: Smartcom - Bulgaria AD
126 lines
1.7 KiB
Plaintext
126 lines
1.7 KiB
Plaintext
/dts-v1/;
|
|
|
|
#include "mt7620a.dtsi"
|
|
|
|
/ {
|
|
compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
|
|
model = "Ralink MT7620a + MT7610e evaluation board";
|
|
|
|
gpio-keys-polled {
|
|
compatible = "gpio-keys";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
poll-interval = <20>;
|
|
|
|
s2 {
|
|
label = "S2";
|
|
gpios = <&gpio0 1 1>;
|
|
linux,code = <0x100>;
|
|
};
|
|
|
|
s3 {
|
|
label = "S3";
|
|
gpios = <&gpio0 2 1>;
|
|
linux,code = <0x101>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
linux,modalias = "m25p80", "en25q64";
|
|
spi-max-frequency = <10000000>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "u-boot-env";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
label = "firmware";
|
|
reg = <0x50000 0x7b0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
state_default: pinctrl0 {
|
|
gpio {
|
|
ralink,group = "i2c", "uartf";
|
|
ralink,function = "gpio";
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
|
|
mediatek,portmap = "llllw";
|
|
|
|
port@4 {
|
|
status = "okay";
|
|
phy-mode = "rgmii";
|
|
phy-handle = <&phy4>;
|
|
};
|
|
|
|
port@5 {
|
|
status = "okay";
|
|
phy-mode = "rgmii";
|
|
phy-handle = <&phy5>;
|
|
};
|
|
|
|
mdio-bus {
|
|
status = "okay";
|
|
|
|
phy4: ethernet-phy@4 {
|
|
reg = <4>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
phy5: ethernet-phy@5 {
|
|
reg = <5>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
};
|
|
};
|
|
|
|
&gsw {
|
|
mediatek,port4 = "gmac";
|
|
};
|
|
|
|
&sdhci {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&ohci {
|
|
status = "okay";
|
|
};
|