4d892e4f22
The Alpine Platform-On-Chip offers multicore processing (quad ARM Cortex-A15), 1/10Gb Ethernet, SATA 3, PCI-E 3, DMA engines, Virtualization, Advanced Power Management and other. This code drop involves basic platform support including: SMP, IRQs, SerDes, SATA. As of now it is missing the PCIe support. Part of the functionality is provided by the low-level code (HAL) delivered by the chip vendor (Annapurna Labs) and is a subject to change in the future (is planned to be moved to sys/contrib directory). The review log for this commit is available here: https://reviews.freebsd.org/D2340 Reviewed by: andrew, ian, imp Obtained from: Semihalf Sponsored by: Annapurna Labs
159 lines
4.1 KiB
C
159 lines
4.1 KiB
C
/*-
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* Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
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* Copyright (c) 2015 Semihalf.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/fdt.h>
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#include <machine/intr.h>
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#define WDTLOAD 0x000
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#define LOAD_MIN 0x00000001
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#define LOAD_MAX 0xFFFFFFFF
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#define WDTVALUE 0x004
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#define WDTCONTROL 0x008
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/* control register masks */
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#define INT_ENABLE (1 << 0)
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#define RESET_ENABLE (1 << 1)
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#define WDTLOCK 0xC00
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#define UNLOCK 0x1ACCE551
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#define LOCK 0x00000001
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extern bus_addr_t al_devmap_pa;
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struct fdt_fixup_entry fdt_fixup_table[] = {
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{ NULL, NULL }
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};
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static int alpine_get_wdt_base(uint32_t *pbase, uint32_t *psize);
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static int alpine_pic_decode_fdt(uint32_t iparent, uint32_t *intr,
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int *interrupt, int *trig, int *pol);
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int alpine_get_devmap_base(bus_addr_t *pa, bus_addr_t *size);
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int alpine_get_devmap_base(bus_addr_t *pa, bus_addr_t *size)
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{
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phandle_t node;
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if ((node = OF_finddevice("/")) == 0)
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return (ENXIO);
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if ((node = fdt_find_compatible(node, "simple-bus", 1)) == 0)
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return (ENXIO);
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return fdt_get_range(node, 0, pa, size);
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}
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static int
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alpine_get_wdt_base(uint32_t *pbase, uint32_t *psize)
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{
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phandle_t node;
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u_long base = 0;
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u_long size = 0;
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if (pbase == NULL || psize == NULL)
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return (EINVAL);
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if ((node = OF_finddevice("/")) == -1)
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return (EFAULT);
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if ((node = fdt_find_compatible(node, "simple-bus", 1)) == 0)
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return (EFAULT);
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if ((node =
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fdt_find_compatible(node, "arm,sp805", 1)) == 0)
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return (EFAULT);
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if (fdt_regsize(node, &base, &size))
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return (EFAULT);
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*pbase = base;
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*psize = size;
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return (0);
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}
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void
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cpu_reset(void)
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{
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uint32_t wdbase, wdsize;
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bus_addr_t wdbaddr;
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int ret;
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ret = alpine_get_wdt_base(&wdbase, &wdsize);
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if (ret) {
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printf("Unable to get WDT base, do power down manually...");
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goto infinite;
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}
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ret = bus_space_map(fdtbus_bs_tag, al_devmap_pa + wdbase,
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wdsize, 0, &wdbaddr);
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if (ret) {
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printf("Unable to map WDT base, do power down manually...");
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goto infinite;
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}
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bus_space_write_4(fdtbus_bs_tag, wdbaddr, WDTLOCK, UNLOCK);
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bus_space_write_4(fdtbus_bs_tag, wdbaddr, WDTLOAD, LOAD_MIN);
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bus_space_write_4(fdtbus_bs_tag, wdbaddr, WDTCONTROL, INT_ENABLE | RESET_ENABLE);
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infinite:
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while (1) {}
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}
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static int
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alpine_pic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt,
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int *trig, int *pol)
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{
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int rv = 0;
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rv = gic_decode_fdt(iparent, intr, interrupt, trig, pol);
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if (rv == 0) {
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/* This was recognized as our PIC and decoded. */
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interrupt = FDT_MAP_IRQ(iparent, interrupt);
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/* Configure the interrupt if callback provided */
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if (arm_config_irq)
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(*arm_config_irq)(*interrupt, *trig, *pol);
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}
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return (rv);
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}
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fdt_pic_decode_t fdt_pic_table[] = {
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&alpine_pic_decode_fdt,
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NULL
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};
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