97 lines
4.1 KiB
C
97 lines
4.1 KiB
C
/******************************************************************************
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SPDX-License-Identifier: BSD-3-Clause
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Copyright (c) 2001-2020, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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#ifndef _E1000_MANAGE_H_
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#define _E1000_MANAGE_H_
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bool e1000_check_mng_mode_generic(struct e1000_hw *hw);
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bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw);
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s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw);
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s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
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u16 length, u16 offset, u8 *sum);
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s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
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struct e1000_host_mng_command_header *hdr);
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s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw,
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u8 *buffer, u16 length);
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bool e1000_enable_mng_pass_thru(struct e1000_hw *hw);
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u8 e1000_calculate_checksum(u8 *buffer, u32 length);
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s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length);
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s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length);
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enum e1000_mng_mode {
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e1000_mng_mode_none = 0,
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e1000_mng_mode_asf,
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e1000_mng_mode_pt,
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e1000_mng_mode_ipmi,
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e1000_mng_mode_host_if_only
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};
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#define E1000_FACTPS_MNGCG 0x20000000
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#define E1000_FWSM_MODE_MASK 0xE
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#define E1000_FWSM_MODE_SHIFT 1
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#define E1000_FWSM_FW_VALID 0x00008000
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#define E1000_FWSM_HI_EN_ONLY_MODE 0x4
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#define E1000_MNG_IAMT_MODE 0x3
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#define E1000_MNG_DHCP_COOKIE_LENGTH 0x10
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#define E1000_MNG_DHCP_COOKIE_OFFSET 0x6F0
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#define E1000_MNG_DHCP_COMMAND_TIMEOUT 10
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#define E1000_MNG_DHCP_TX_PAYLOAD_CMD 64
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#define E1000_MNG_DHCP_COOKIE_STATUS_PARSING 0x1
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#define E1000_MNG_DHCP_COOKIE_STATUS_VLAN 0x2
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#define E1000_VFTA_ENTRY_SHIFT 5
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#define E1000_VFTA_ENTRY_MASK 0x7F
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#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F
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#define E1000_HI_MAX_BLOCK_BYTE_LENGTH 1792 /* Num of bytes in range */
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#define E1000_HI_MAX_BLOCK_DWORD_LENGTH 448 /* Num of dwords in range */
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#define E1000_HI_COMMAND_TIMEOUT 500 /* Process HI cmd limit */
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#define E1000_HI_FW_BASE_ADDRESS 0x10000
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#define E1000_HI_FW_MAX_LENGTH (64 * 1024) /* Num of bytes */
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#define E1000_HI_FW_BLOCK_DWORD_LENGTH 256 /* Num of DWORDs per page */
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#define E1000_HICR_MEMORY_BASE_EN 0x200 /* MB Enable bit - RO */
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#define E1000_HICR_EN 0x01 /* Enable bit - RO */
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/* Driver sets this bit when done to put command in RAM */
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#define E1000_HICR_C 0x02
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#define E1000_HICR_SV 0x04 /* Status Validity */
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#define E1000_HICR_FW_RESET_ENABLE 0x40
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#define E1000_HICR_FW_RESET 0x80
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/* Intel(R) Active Management Technology signature */
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#define E1000_IAMT_SIGNATURE 0x544D4149
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#endif
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