f2972d7eb8
controllers (PDC203** PDC206**). This also adds preliminary support for the Promise SX4/SX4000 but *only* as a "normal" Promise ATA controller (ATA RAID's are supported though but only RAID0, RAID1 and RAID0+1). This cuts off yet another 5-8% of the command overhead on promise controllers, making them the fastest we have ever had support for. Work is now continuing to add support for this in ATA RAID, to accellerate ATA RAID quite a bit on these controllers, and especially the SX4/SX4000 series as they have quite a few tricks in there.. This commit also adds a few fixes to the SATA code needed for proper support.
288 lines
8.6 KiB
C
288 lines
8.6 KiB
C
/*-
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* Copyright (c) 1998 - 2004 Søren Schmidt <sos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/ata.h>
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#include <sys/kernel.h>
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#include <sys/endian.h>
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#include <sys/malloc.h>
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#include <sys/lock.h>
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#include <sys/sema.h>
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#include <sys/taskqueue.h>
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#include <vm/uma.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <dev/pci/pcivar.h>
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#include <dev/ata/ata-all.h>
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#include <dev/ata/ata-pci.h>
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/* prototypes */
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static void ata_dmaalloc(struct ata_channel *);
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static void ata_dmafree(struct ata_channel *);
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static void ata_dmasetupd_cb(void *, bus_dma_segment_t *, int, int);
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static int ata_dmaload(struct ata_device *, caddr_t, int32_t, int);
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static int ata_dmaunload(struct ata_channel *);
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/* local vars */
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static MALLOC_DEFINE(M_ATADMA, "ATA DMA", "ATA driver DMA");
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/* misc defines */
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#define MAXSEGSZ PAGE_SIZE
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#define MAXTABSZ PAGE_SIZE
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#define MAXWSPCSZ 256
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#define MAXCTLDMASZ (2 * (MAXTABSZ + MAXPHYS))
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struct ata_dc_cb_args {
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bus_addr_t maddr;
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int error;
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};
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void
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ata_dmainit(struct ata_channel *ch)
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{
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if ((ch->dma = malloc(sizeof(struct ata_dma), M_ATADMA, M_NOWAIT|M_ZERO))) {
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ch->dma->alloc = ata_dmaalloc;
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ch->dma->free = ata_dmafree;
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ch->dma->load = ata_dmaload;
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ch->dma->unload = ata_dmaunload;
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ch->dma->alignment = 2;
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ch->dma->max_iosize = 64 * 1024;
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ch->dma->boundary = 64 * 1024;
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}
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}
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static void
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ata_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
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{
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struct ata_dc_cb_args *cba = (struct ata_dc_cb_args *)xsc;
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if (!(cba->error = error))
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cba->maddr = segs[0].ds_addr;
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}
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static void
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ata_dmaalloc(struct ata_channel *ch)
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{
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struct ata_dc_cb_args ccba;
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if (bus_dma_tag_create(NULL, 1, 0,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
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NULL, NULL, MAXCTLDMASZ,
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ATA_DMA_ENTRIES, BUS_SPACE_MAXSIZE_32BIT,
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BUS_DMA_ALLOCNOW, NULL, NULL, &ch->dma->dmatag))
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goto error;
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if (bus_dma_tag_create(ch->dma->dmatag, PAGE_SIZE, PAGE_SIZE,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
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NULL, NULL, MAXTABSZ, 1, MAXTABSZ,
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BUS_DMA_ALLOCNOW, NULL, NULL, &ch->dma->cdmatag))
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goto error;
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if (bus_dma_tag_create(ch->dma->dmatag,ch->dma->alignment,ch->dma->boundary,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
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NULL, NULL, ch->dma->max_iosize,
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ATA_DMA_ENTRIES, ch->dma->boundary,
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BUS_DMA_ALLOCNOW, NULL, NULL, &ch->dma->ddmatag))
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goto error;
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if (bus_dmamem_alloc(ch->dma->cdmatag, (void **)&ch->dma->dmatab, 0,
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&ch->dma->cdmamap))
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goto error;
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if (bus_dmamap_load(ch->dma->cdmatag, ch->dma->cdmamap, ch->dma->dmatab,
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MAXTABSZ, ata_dmasetupc_cb, &ccba, 0) || ccba.error) {
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bus_dmamem_free(ch->dma->cdmatag, ch->dma->dmatab, ch->dma->cdmamap);
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goto error;
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}
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ch->dma->mdmatab = ccba.maddr;
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if (bus_dmamap_create(ch->dma->ddmatag, 0, &ch->dma->ddmamap))
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goto error;
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if (bus_dma_tag_create(ch->dma->dmatag, PAGE_SIZE, PAGE_SIZE,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
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NULL, NULL, MAXWSPCSZ, 1, MAXWSPCSZ,
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BUS_DMA_ALLOCNOW, NULL, NULL, &ch->dma->wdmatag))
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goto error;
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if (bus_dmamem_alloc(ch->dma->wdmatag, (void **)&ch->dma->workspace, 0,
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&ch->dma->wdmamap))
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goto error;
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if (bus_dmamap_load(ch->dma->wdmatag, ch->dma->wdmamap, ch->dma->workspace,
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MAXWSPCSZ, ata_dmasetupc_cb, &ccba, 0) || ccba.error) {
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bus_dmamem_free(ch->dma->wdmatag, ch->dma->workspace, ch->dma->wdmamap);
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goto error;
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}
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ch->dma->wdmatab = ccba.maddr;
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return;
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error:
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ata_printf(ch, -1, "WARNING - DMA allocation failed, disabling DMA\n");
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ata_dmafree(ch);
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free(ch->dma, M_ATADMA);
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ch->dma = NULL;
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}
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static void
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ata_dmafree(struct ata_channel *ch)
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{
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if (ch->dma->wdmatab) {
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bus_dmamap_unload(ch->dma->wdmatag, ch->dma->wdmamap);
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bus_dmamem_free(ch->dma->wdmatag, ch->dma->workspace, ch->dma->wdmamap);
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ch->dma->wdmatab = 0;
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ch->dma->wdmamap = NULL;
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ch->dma->workspace = NULL;
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}
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if (ch->dma->wdmatag) {
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bus_dma_tag_destroy(ch->dma->wdmatag);
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ch->dma->wdmatag = NULL;
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}
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if (ch->dma->mdmatab) {
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bus_dmamap_unload(ch->dma->cdmatag, ch->dma->cdmamap);
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bus_dmamem_free(ch->dma->cdmatag, ch->dma->dmatab, ch->dma->cdmamap);
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ch->dma->mdmatab = 0;
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ch->dma->cdmamap = NULL;
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ch->dma->dmatab = NULL;
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}
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if (ch->dma->ddmamap) {
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bus_dmamap_destroy(ch->dma->ddmatag, ch->dma->ddmamap);
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ch->dma->ddmamap = NULL;
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}
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if (ch->dma->cdmatag) {
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bus_dma_tag_destroy(ch->dma->cdmatag);
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ch->dma->cdmatag = NULL;
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}
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if (ch->dma->ddmatag) {
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bus_dma_tag_destroy(ch->dma->ddmatag);
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ch->dma->ddmatag = NULL;
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}
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if (ch->dma->dmatag) {
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bus_dma_tag_destroy(ch->dma->dmatag);
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ch->dma->dmatag = NULL;
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}
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}
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struct ata_dmasetup_data_cb_args {
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struct ata_dmaentry *dmatab;
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int error;
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};
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static void
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ata_dmasetupd_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
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{
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struct ata_dmasetup_data_cb_args *cba =
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(struct ata_dmasetup_data_cb_args *)xsc;
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bus_size_t cnt;
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u_int32_t lastcount;
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int i, j;
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cba->error = error;
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if (error != 0)
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return;
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lastcount = j = 0;
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for (i = 0; i < nsegs; i++) {
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/*
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* A maximum segment size was specified for bus_dma_tag_create, but
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* some busdma code does not seem to honor this, so fix up if needed.
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*/
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for (cnt = 0; cnt < segs[i].ds_len; cnt += MAXSEGSZ, j++) {
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cba->dmatab[j].base = htole32(segs[i].ds_addr + cnt);
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lastcount = ulmin(segs[i].ds_len - cnt, MAXSEGSZ) & 0xffff;
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cba->dmatab[j].count = htole32(lastcount);
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}
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}
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cba->dmatab[j - 1].count = htole32(lastcount | ATA_DMA_EOT);
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}
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static int
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ata_dmaload(struct ata_device *atadev, caddr_t data, int32_t count, int dir)
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{
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struct ata_channel *ch = atadev->channel;
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struct ata_dmasetup_data_cb_args cba;
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if (ch->dma->flags & ATA_DMA_ACTIVE) {
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ata_prtdev(atadev, "FAILURE - already active DMA on this device\n");
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return -1;
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}
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if (!count) {
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ata_prtdev(atadev, "FAILURE - zero length DMA transfer attempted\n");
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return -1;
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}
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if (((uintptr_t)data & (ch->dma->alignment - 1)) ||
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(count & (ch->dma->alignment - 1))) {
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ata_prtdev(atadev, "FAILURE - non aligned DMA transfer attempted\n");
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return -1;
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}
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if (count > ch->dma->max_iosize) {
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ata_prtdev(atadev,
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"FAILURE - oversized DMA transfer attempted %d > %d\n",
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count, ch->dma->max_iosize);
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return -1;
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}
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cba.dmatab = ch->dma->dmatab;
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bus_dmamap_sync(ch->dma->cdmatag, ch->dma->cdmamap, BUS_DMASYNC_PREWRITE);
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if (bus_dmamap_load(ch->dma->ddmatag, ch->dma->ddmamap, data, count,
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ata_dmasetupd_cb, &cba, 0) || cba.error)
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return -1;
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bus_dmamap_sync(ch->dma->ddmatag, ch->dma->ddmamap,
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dir ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
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ch->dma->cur_iosize = count;
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ch->dma->flags = dir ? (ATA_DMA_ACTIVE | ATA_DMA_READ) : ATA_DMA_ACTIVE;
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return 0;
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}
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int
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ata_dmaunload(struct ata_channel *ch)
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{
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bus_dmamap_sync(ch->dma->cdmatag, ch->dma->cdmamap, BUS_DMASYNC_POSTWRITE);
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bus_dmamap_sync(ch->dma->ddmatag, ch->dma->ddmamap,
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(ch->dma->flags & ATA_DMA_READ) != 0 ?
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BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(ch->dma->ddmatag, ch->dma->ddmamap);
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ch->dma->cur_iosize = 0;
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ch->dma->flags = 0;
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return 0;
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}
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