686450c898
and armv6 architecures. The primary enhancement over the old design is support for hierarchical interrupt controllers (such as a gpio driver which can receive interrupts from a root PIC and act as a PIC itself for clients interested in handling a change of gpio pin state as an interrupt). The new code also provides an infrastructure for mapping interrupts described in metadata in the form of a "controller reference plus interrupt number" tuple into the simple "0-n" flat numeric space understood by rman and the bus resource mechanisms. Use of the new code is enabled by setting the ARM_INTRNG option, and by making a few simple changes to the platform's support code. In addition each existing PIC driver needs changes to be ready for INTRNG; this commit contains the changes for the arm/gic driver, which most armv6 SoCs use, but it does not enable the new code yet on any platform. This project has been many years in the making, starting as a GSoC project by Jakub Klama (jceel@) in 2012. That didn't get committed right away and the source base evolved out from under it to some degree. In 2014 I rebased the diffs to then -current and did some enhancements in the area of mapping interrupt numbers and storing associated fdt data, then the project went cold again for a while. Eventually Svata Kraus took that work in progress and did another big round of work on it, removing most of the remaining rough edges. Finally I took that and made one more pass through it, mostly disabling the "INTR_SOLO" feature for now, pending further design discussions on how to most efficiently dispatch a pending interrupt through more than one layer of PIC. The current code with the INTR_SOLO feature disabled uses approximate 100 extra cpu cycles for each cascaded PIC the interrupt has to be passed to, so what's left to do is about efficiency, not correct operation. Differential Revision: https://reviews.freebsd.org/D2047
73 lines
1.9 KiB
Plaintext
73 lines
1.9 KiB
Plaintext
#$FreeBSD$
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ARMV6 opt_global.h
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ARM_CACHE_LOCK_ENABLE opt_global.h
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ARM_INTRNG opt_global.h
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ARM_KERN_DIRECTMAP opt_vm.h
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ARM_L2_PIPT opt_global.h
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ARM_MANY_BOARD opt_global.h
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ARM_NEW_PMAP opt_global.h
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NKPT2PG opt_pmap.h
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ARM_WANT_TP_ADDRESS opt_global.h
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COUNTS_PER_SEC opt_timer.h
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CPU_ARM9 opt_global.h
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CPU_ARM9E opt_global.h
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CPU_ARM1176 opt_global.h
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CPU_CORTEXA opt_global.h
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CPU_KRAIT opt_global.h
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CPU_FA526 opt_global.h
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CPU_MV_PJ4B opt_global.h
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CPU_XSCALE_80219 opt_global.h
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CPU_XSCALE_80321 opt_global.h
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CPU_XSCALE_81342 opt_global.h
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CPU_XSCALE_IXP425 opt_global.h
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CPU_XSCALE_IXP435 opt_global.h
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CPU_XSCALE_PXA2X0 opt_global.h
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DEV_GIC opt_global.h
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EFI opt_platform.h
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FLASHADDR opt_global.h
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GIC_DEFAULT_ICFGR_INIT opt_global.h
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IPI_IRQ_START opt_smp.h
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IPI_IRQ_END opt_smp.h
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FREEBSD_BOOT_LOADER opt_global.h
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IXP4XX_FLASH_SIZE opt_global.h
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KERNBASE opt_global.h
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KERNPHYSADDR opt_global.h
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KERNVIRTADDR opt_global.h
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LINUX_BOOT_ABI opt_global.h
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LOADERRAMADDR opt_global.h
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PHYSADDR opt_global.h
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PLATFORM opt_global.h
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SOCDEV_PA opt_global.h
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SOCDEV_VA opt_global.h
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PV_STATS opt_pmap.h
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QEMU_WORKAROUNDS opt_global.h
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SOC_BCM2835 opt_global.h
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SOC_BCM2836 opt_global.h
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SOC_IMX51 opt_global.h
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SOC_IMX53 opt_global.h
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SOC_IMX6 opt_global.h
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SOC_MV_ARMADAXP opt_global.h
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SOC_MV_DISCOVERY opt_global.h
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SOC_MV_DOVE opt_global.h
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SOC_MV_FREY opt_global.h
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SOC_MV_KIRKWOOD opt_global.h
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SOC_MV_LOKIPLUS opt_global.h
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SOC_MV_ORION opt_global.h
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SOC_OMAP3 opt_global.h
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SOC_OMAP4 opt_global.h
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SOC_TI_AM335X opt_global.h
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SOC_TEGRA2 opt_global.h
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XSCALE_CACHE_READ_WRITE_ALLOCATE opt_global.h
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XSACLE_DISABLE_CCNT opt_timer.h
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VERBOSE_INIT_ARM opt_global.h
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VM_MAXUSER_ADDRESS opt_global.h
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AT91_ATE_USE_RMII opt_at91.h
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AT91_MCI_ALLOW_OVERCLOCK opt_at91.h
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AT91_MCI_HAS_4WIRE opt_at91.h
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AT91_MCI_SLOT_B opt_at91.h
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GFB_DEBUG opt_gfb.h
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GFB_NO_FONT_LOADING opt_gfb.h
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GFB_NO_MODE_CHANGE opt_gfb.h
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AT91C_MAIN_CLOCK opt_at91.h
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VFP opt_global.h
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