68a594774e
New ThunderX firmware incorporates modified DTB that presents different device hierarchy. In the new device tree, MDIO devices are below two additional buses that oddly hang on PCI bridge. Obtained from: Semihalf Sponsored by: Cavium Differential Revision: https://reviews.freebsd.org/D5069
71 lines
2.6 KiB
C
71 lines
2.6 KiB
C
/*-
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* Copyright (c) 2015 The FreeBSD Foundation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _CAVIUM_THUNDER_PCIE_COMMON_H_
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#define _CAVIUM_THUNDER_PCIE_COMMON_H_
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#define RANGES_TUPLES_MAX 6
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#define RANGES_TUPLES_INVALID (RANGES_TUPLES_MAX + 1)
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DECLARE_CLASS(thunder_pcie_driver);
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MALLOC_DECLARE(M_THUNDER_PCIE);
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struct pcie_range {
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uint64_t pci_base;
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uint64_t phys_base;
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uint64_t size;
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uint64_t flags;
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};
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struct thunder_pcie_softc {
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struct pcie_range ranges[RANGES_TUPLES_MAX];
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struct rman mem_rman;
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struct resource *res;
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int ecam;
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device_t dev;
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};
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uint32_t range_addr_is_pci(struct pcie_range *, uint64_t, uint64_t);
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uint32_t range_addr_is_phys(struct pcie_range *, uint64_t, uint64_t);
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uint64_t range_addr_pci_to_phys(struct pcie_range *, uint64_t);
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int thunder_common_alloc_msi(device_t, device_t, int, int, int *);
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int thunder_common_alloc_msix(device_t, device_t, int *);
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int thunder_common_map_msi(device_t, device_t, int, uint64_t *, uint32_t *);
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int thunder_common_release_msi(device_t, device_t, int, int *);
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int thunder_common_release_msix(device_t, device_t, int);
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struct resource *thunder_pcie_alloc_resource(device_t,
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device_t, int, int *, rman_res_t, rman_res_t, rman_res_t, u_int);
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int thunder_pcie_release_resource(device_t, device_t, int, int,
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struct resource *);
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int thunder_pcie_attach(device_t);
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#endif /* _CAVIUM_THUNDER_PCIE_COMMON_H_ */
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