69dcb7e771
providing compiled-in static environment data that is used instead of any data passed in from a boot loader. Previously 'env' worked only on i386 and arm xscale systems, because it required the MD startup code to examine the global envmode variable and decide whether to use static_env or an environment obtained from the boot loader, and set the global kern_envp accordingly. Most startup code wasn't doing so. Making things even more complex, some mips startup code uses an alternate scheme that involves calling init_static_kenv() to pass an empty buffer and its size, then uses a series of kern_setenv() calls to populate that buffer. Now all MD startup code calls init_static_kenv(), and that routine provides a single point where envmode is checked and the decision is made whether to use the compiled-in static_kenv or the values provided by the MD code. The routine also continues to serve its original purpose for mips; if a non-zero buffer size is passed the routine installs the empty buffer ready to accept kern_setenv() values. Now if the size is zero, the provided buffer full of existing env data is installed. A NULL pointer can be passed if the boot loader provides no env data; this allows the static env to be installed if envmode is set to do so. Most of the work here is a near-mechanical change to call the init function instead of directly setting kern_envp. A notable exception is in xen/pv.c; that code was originally installing a buffer full of preformatted env data along with its non-zero size (like mips code does), which would have allowed kern_setenv() calls to wipe out the preformatted data. Now it passes a zero for the size so that the buffer of data it installs is treated as non-writeable.
434 lines
14 KiB
C
434 lines
14 KiB
C
/* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
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/*-
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* Copyright (c) 1994-1998 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* machdep.c
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*
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* Machine dependant functions for kernel setup
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*
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* This file needs a lot of work.
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*
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* Created : 17/09/94
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_kstack_pages.h"
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#define _ARM32_BUS_DMA_PRIVATE
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysproto.h>
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#include <sys/signalvar.h>
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#include <sys/imgact.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/linker.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/ptrace.h>
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#include <sys/cons.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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#include <sys/buf.h>
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#include <sys/exec.h>
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#include <sys/kdb.h>
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#include <sys/msgbuf.h>
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#include <machine/physmem.h>
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#include <machine/reg.h>
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#include <machine/cpu.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/vm_map.h>
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#include <machine/devmap.h>
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#include <machine/vmparam.h>
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#include <machine/pcb.h>
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#include <machine/undefined.h>
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#include <machine/machdep.h>
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#include <machine/metadata.h>
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#include <machine/armreg.h>
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#include <machine/bus.h>
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#include <sys/reboot.h>
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#include <arm/xscale/ixp425/ixp425reg.h>
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#include <arm/xscale/ixp425/ixp425var.h>
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#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
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#define KERNEL_PT_IO 1
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#define KERNEL_PT_IO_NUM 3
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#define KERNEL_PT_BEFOREKERN KERNEL_PT_IO + KERNEL_PT_IO_NUM
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#define KERNEL_PT_AFKERNEL KERNEL_PT_BEFOREKERN + 1 /* L2 table for mapping after kernel */
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#define KERNEL_PT_AFKERNEL_NUM 9
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/* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
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#define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
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struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
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/* Physical and virtual addresses for some global pages */
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struct pv_addr systempage;
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struct pv_addr msgbufpv;
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struct pv_addr irqstack;
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struct pv_addr undstack;
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struct pv_addr abtstack;
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struct pv_addr kernelstack;
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struct pv_addr minidataclean;
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/* Static device mappings. */
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static const struct arm_devmap_entry ixp425_devmap[] = {
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/* Physical/Virtual address for I/O space */
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{ IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* Expansion Bus */
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{ IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* CFI Flash on the Expansion Bus */
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{ IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
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IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* IXP425 PCI Configuration */
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{ IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* SDRAM Controller */
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{ IXP425_MCU_VBASE, IXP425_MCU_HWBASE, IXP425_MCU_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* PCI Memory Space */
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{ IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* Q-Mgr Memory Space */
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{ IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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{ 0 },
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};
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/* Static device mappings. */
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static const struct arm_devmap_entry ixp435_devmap[] = {
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/* Physical/Virtual address for I/O space */
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{ IXP425_IO_VBASE, IXP425_IO_HWBASE, IXP425_IO_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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{ IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* IXP425 PCI Configuration */
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{ IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* DDRII Controller NB: mapped same place as IXP425 */
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{ IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* PCI Memory Space */
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{ IXP425_PCI_MEM_VBASE, IXP425_PCI_MEM_HWBASE, IXP425_PCI_MEM_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* Q-Mgr Memory Space */
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{ IXP425_QMGR_VBASE, IXP425_QMGR_HWBASE, IXP425_QMGR_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* CFI Flash on the Expansion Bus */
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{ IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE,
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IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* USB1 Memory Space */
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{ IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* USB2 Memory Space */
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{ IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* GPS Memory Space */
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{ CAMBRIA_GPS_VBASE, CAMBRIA_GPS_HWBASE, CAMBRIA_GPS_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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/* RS485 Memory Space */
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{ CAMBRIA_RS485_VBASE, CAMBRIA_RS485_HWBASE, CAMBRIA_RS485_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_DEVICE, },
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{ 0 }
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};
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extern vm_offset_t xscale_cache_clean_addr;
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void *
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initarm(struct arm_boot_params *abp)
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{
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#define next_chunk2(a,b) (((a) + (b)) &~ ((b)-1))
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#define next_page(a) next_chunk2(a,PAGE_SIZE)
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struct pv_addr kernel_l1pt;
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struct pv_addr dpcpu;
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int loop, i;
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u_int l1pagetable;
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vm_offset_t freemempos;
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vm_offset_t freemem_pt;
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vm_offset_t afterkern;
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vm_offset_t freemem_after;
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vm_offset_t lastaddr;
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uint32_t memsize;
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/* kernel text starts where we were loaded at boot */
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#define KERNEL_TEXT_OFF (abp->abp_physaddr - PHYSADDR)
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#define KERNEL_TEXT_BASE (KERNBASE + KERNEL_TEXT_OFF)
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#define KERNEL_TEXT_PHYS (PHYSADDR + KERNEL_TEXT_OFF)
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lastaddr = parse_boot_param(abp);
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arm_physmem_kernaddr = abp->abp_physaddr;
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set_cpufuncs(); /* NB: sets cputype */
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pcpu_init(pcpup, 0, sizeof(struct pcpu));
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PCPU_SET(curthread, &thread0);
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init_static_kenv(NULL, 0);
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/* Do basic tuning, hz etc */
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init_param1();
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/*
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* We allocate memory downwards from where we were loaded
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* by RedBoot; first the L1 page table, then NUM_KERNEL_PTS
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* entries in the L2 page table. Past that we re-align the
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* allocation boundary so later data structures (stacks, etc)
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* can be mapped with different attributes (write-back vs
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* write-through). Note this leaves a gap for expansion
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* (or might be repurposed).
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*/
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freemempos = abp->abp_physaddr;
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/* macros to simplify initial memory allocation */
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#define alloc_pages(var, np) do { \
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freemempos -= (np * PAGE_SIZE); \
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(var) = freemempos; \
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/* NB: this works because locore maps PA=VA */ \
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memset((char *)(var), 0, ((np) * PAGE_SIZE)); \
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} while (0)
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#define valloc_pages(var, np) do { \
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alloc_pages((var).pv_pa, (np)); \
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(var).pv_va = (var).pv_pa + (KERNVIRTADDR - abp->abp_physaddr); \
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} while (0)
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/* force L1 page table alignment */
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while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
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freemempos -= PAGE_SIZE;
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/* allocate contiguous L1 page table */
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valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
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/* now allocate L2 page tables; they are linked to L1 below */
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for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
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if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
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valloc_pages(kernel_pt_table[loop],
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L2_TABLE_SIZE / PAGE_SIZE);
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} else {
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kernel_pt_table[loop].pv_pa = freemempos +
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(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
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L2_TABLE_SIZE_REAL;
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kernel_pt_table[loop].pv_va =
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kernel_pt_table[loop].pv_pa +
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(KERNVIRTADDR - abp->abp_physaddr);
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}
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}
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freemem_pt = freemempos; /* base of allocated pt's */
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/*
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* Re-align allocation boundary so we can map the area
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* write-back instead of write-through for the stacks and
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* related structures allocated below.
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*/
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freemempos = PHYSADDR + 0x100000;
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/*
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* Allocate a page for the system page mapped to V0x00000000
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* This page will just contain the system vectors and can be
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* shared by all processes.
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*/
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valloc_pages(systempage, 1);
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/* Allocate dynamic per-cpu area. */
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valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
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dpcpu_init((void *)dpcpu.pv_va, 0);
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/* Allocate stacks for all modes */
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valloc_pages(irqstack, IRQ_STACK_SIZE);
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valloc_pages(abtstack, ABT_STACK_SIZE);
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valloc_pages(undstack, UND_STACK_SIZE);
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valloc_pages(kernelstack, kstack_pages);
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alloc_pages(minidataclean.pv_pa, 1);
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valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
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/*
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* Now construct the L1 page table. First map the L2
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* page tables into the L1 so we can replace L1 mappings
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* later on if necessary
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*/
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l1pagetable = kernel_l1pt.pv_va;
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/* Map the L2 pages tables in the L1 page table */
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pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
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&kernel_pt_table[KERNEL_PT_SYS]);
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pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE,
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&kernel_pt_table[KERNEL_PT_IO]);
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pmap_link_l2pt(l1pagetable, IXP425_MCU_VBASE,
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&kernel_pt_table[KERNEL_PT_IO + 1]);
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pmap_link_l2pt(l1pagetable, IXP425_PCI_MEM_VBASE,
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&kernel_pt_table[KERNEL_PT_IO + 2]);
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pmap_link_l2pt(l1pagetable, KERNBASE,
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&kernel_pt_table[KERNEL_PT_BEFOREKERN]);
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pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 0x100000,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, PHYSADDR + 0x100000,
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0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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pmap_map_chunk(l1pagetable, KERNEL_TEXT_BASE, KERNEL_TEXT_PHYS,
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next_chunk2(((uint32_t)lastaddr) - KERNEL_TEXT_BASE, L1_S_SIZE),
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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freemem_after = next_page((int)lastaddr);
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afterkern = round_page(next_chunk2((vm_offset_t)lastaddr, L1_S_SIZE));
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for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
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pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
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&kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
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}
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pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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/* Map the Mini-Data cache clean area. */
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xscale_setup_minidata(l1pagetable, afterkern,
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minidataclean.pv_pa);
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/* Map the vector page. */
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pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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if (cpu_is_ixp43x())
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arm_devmap_bootstrap(l1pagetable, ixp435_devmap);
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else
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arm_devmap_bootstrap(l1pagetable, ixp425_devmap);
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/*
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* Give the XScale global cache clean code an appropriately
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* sized chunk of unmapped VA space starting at 0xff000000
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* (our device mappings end before this address).
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*/
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xscale_cache_clean_addr = 0xff000000U;
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cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
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setttb(kernel_l1pt.pv_pa);
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cpu_tlb_flushID();
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cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
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/*
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* Pages were allocated during the secondary bootstrap for the
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* stacks for different CPU modes.
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* We must now set the r13 registers in the different CPU modes to
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* point to these stacks.
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* Since the ARM stacks use STMFD etc. we must set r13 to the top end
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* of the stack memory.
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*/
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set_stackptrs(0);
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/*
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* We must now clean the cache again....
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* Cleaning may be done by reading new data to displace any
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* dirty data in the cache. This will have happened in setttb()
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* but since we are boot strapping the addresses used for the read
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* may have just been remapped and thus the cache could be out
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* of sync. A re-clean after the switch will cure this.
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* After booting there are no gross relocations of the kernel thus
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* this problem will not occur after initarm().
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*/
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cpu_idcache_wbinv_all();
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cpu_setup();
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/* ready to setup the console (XXX move earlier if possible) */
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cninit();
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/*
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* Fetch the RAM size from the MCU registers. The
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* expansion bus was mapped above so we can now read 'em.
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*/
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if (cpu_is_ixp43x())
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memsize = ixp435_ddram_size();
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else
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memsize = ixp425_sdram_size();
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undefined_init();
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init_proc0(kernelstack.pv_va);
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arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
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pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
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vm_max_kernel_address = 0xe0000000;
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pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
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msgbufp = (void*)msgbufpv.pv_va;
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msgbufinit(msgbufp, msgbufsize);
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mutex_init();
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/*
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* Add the physical ram we have available.
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*
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* Exclude the kernel, and all the things we allocated which immediately
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* follow the kernel, from the VM allocation pool but not from crash
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* dumps. virtual_avail is a global variable which tracks the kva we've
|
|
* "allocated" while setting up pmaps.
|
|
*
|
|
* Prepare the list of physical memory available to the vm subsystem.
|
|
*/
|
|
arm_physmem_hardware_region(PHYSADDR, memsize);
|
|
arm_physmem_exclude_region(freemem_pt, abp->abp_physaddr -
|
|
freemem_pt, EXFLAG_NOALLOC);
|
|
arm_physmem_exclude_region(freemempos, abp->abp_physaddr - 0x100000 -
|
|
freemempos, EXFLAG_NOALLOC);
|
|
arm_physmem_exclude_region(abp->abp_physaddr,
|
|
virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
|
|
arm_physmem_init_kernel_globals();
|
|
|
|
init_param2(physmem);
|
|
kdb_init();
|
|
|
|
return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
|
|
sizeof(struct pcb)));
|
|
#undef next_page
|
|
#undef next_chunk2
|
|
}
|