Summary: This reduces the precious TLB1 entry consumption (64 possible in existing 64-bit cores), by adjusting the size and alignment of a device mapping to a power of 2, to encompass the full mapping and its surroundings. One caveat with this: If a mapping really is smaller than a power of 2, it's possible to get a machine check or hang if the 'missing' physical space is accessed. In practice this should not be an issue for users, as devices overwhelmingly have physical spaces on power-of-two sizes and alignments, and any design that includes devices which don't follow this can be addressed by undefining the POW2_MAPPINGS guard. Reviewed by: bdragon Differential Revision: https://reviews.freebsd.org/D24248 |
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booke_machdep.c | ||
locore.S | ||
machdep_e500.c | ||
mp_cpudep.c | ||
platform_bare.c | ||
pmap_32.c | ||
pmap_64.c | ||
pmap.c | ||
spe.c | ||
trap_subr.S |