6bd95d70db
on for a while: - fine grained TLB shootdown for SMP on i386 - ranged TLB shootdowns.. eg: specify a range of pages to shoot down with a single IPI, since the IPI is very expensive. Adjust some callers that used to trigger this inside tight loops to do a ranged shootdown at the end instead. - PG_G support for SMP on i386 (options ENABLE_PG_G) - defer PG_G activation till after we decide what we are going to do with PSE and the 4MB pages at the start of the kernel. This should solve some rumored strangeness about stale PG_G entries getting stuck underneath the 4MB pages. - add some instrumentation for the fine TLB shootdown - convert some asm instruction wrappers from functions to inlines. gcc seems to do a fair bit better with this. - [temporarily!] pessimize the tlb shootdown IPI handlers. I will fix this again shortly. This has been working fairly well for me for a while, but I have tweaked it again prior to commit since my last major testing round. The only outstanding problem that I know of is PG_G related, which is why there is an option for it (not on by default for SMP). I have seen a world speedups by a few percent (as much as 4 or 5% in one case) but I have *not* accurately measured this - I am a bit sceptical of these numbers.
151 lines
4.4 KiB
C
151 lines
4.4 KiB
C
/*
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* ----------------------------------------------------------------------------
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* "THE BEER-WARE LICENSE" (Revision 42):
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* <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
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* can do whatever you want with this stuff. If we meet some day, and you think
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* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
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* ----------------------------------------------------------------------------
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*
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* $FreeBSD$
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*
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*/
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#ifndef _MACHINE_SMP_H_
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#define _MACHINE_SMP_H_
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#ifdef _KERNEL
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#if defined(SMP) && defined(I386_CPU) && !defined(COMPILING_LINT)
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#error SMP not supported with I386_CPU
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#endif
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#if defined(SMP) && !defined(APIC_IO)
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# error APIC_IO required for SMP, add "options APIC_IO" to your config file.
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#endif /* SMP && !APIC_IO */
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#if defined(SMP) || defined(APIC_IO)
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#ifndef LOCORE
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/*
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* For sending values to POST displays.
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* XXX FIXME: where does this really belong, isa.h/isa.c perhaps?
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*/
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extern int current_postcode; /** XXX currently in mp_machdep.c */
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#define POSTCODE(X) current_postcode = (X), \
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outb(0x80, current_postcode)
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#define POSTCODE_LO(X) current_postcode &= 0xf0, \
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current_postcode |= ((X) & 0x0f), \
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outb(0x80, current_postcode)
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#define POSTCODE_HI(X) current_postcode &= 0x0f, \
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current_postcode |= (((X) << 4) & 0xf0), \
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outb(0x80, current_postcode)
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#include <sys/bus.h> /* XXX */
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#include <machine/apic.h>
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#include <machine/frame.h>
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#include <i386/isa/icu.h>
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#include <i386/isa/intr_machdep.h>
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/*
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* Interprocessor interrupts for SMP.
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*/
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#define IPI_INVLTLB XINVLTLB_OFFSET
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#define IPI_INVLPG XINVLPG_OFFSET
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#define IPI_INVLRNG XINVLRNG_OFFSET
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#define IPI_RENDEZVOUS XRENDEZVOUS_OFFSET
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#define IPI_AST XCPUAST_OFFSET
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#define IPI_STOP XCPUSTOP_OFFSET
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#define IPI_HARDCLOCK XHARDCLOCK_OFFSET
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#define IPI_STATCLOCK XSTATCLOCK_OFFSET
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/* global data in mpboot.s */
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extern int bootMP_size;
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/* functions in mpboot.s */
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void bootMP __P((void));
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/* global data in mp_machdep.c */
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extern int bsp_apic_ready;
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extern int mp_naps;
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extern int mp_nbusses;
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extern int mp_napics;
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extern int mp_picmode;
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extern int boot_cpu_id;
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extern vm_offset_t cpu_apic_address;
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extern vm_offset_t io_apic_address[];
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extern u_int32_t cpu_apic_versions[];
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extern u_int32_t *io_apic_versions;
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extern int cpu_num_to_apic_id[];
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extern int io_num_to_apic_id[];
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extern int apic_id_to_logical[];
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#define APIC_INTMAPSIZE 32
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struct apic_intmapinfo {
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int ioapic;
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int int_pin;
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volatile void *apic_address;
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int redirindex;
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};
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extern struct apic_intmapinfo int_to_apicintpin[];
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extern struct pcb stoppcbs[];
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/* functions in mp_machdep.c */
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void i386_mp_probe __P((void));
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u_int mp_bootaddress __P((u_int));
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u_int isa_apic_mask __P((u_int));
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int isa_apic_irq __P((int));
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int pci_apic_irq __P((int, int, int));
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int apic_irq __P((int, int));
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int next_apic_irq __P((int));
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int undirect_isa_irq __P((int));
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int undirect_pci_irq __P((int));
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int apic_bus_type __P((int));
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int apic_src_bus_id __P((int, int));
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int apic_src_bus_irq __P((int, int));
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int apic_int_type __P((int, int));
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int apic_trigger __P((int, int));
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int apic_polarity __P((int, int));
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void assign_apic_irq __P((int apic, int intpin, int irq));
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void revoke_apic_irq __P((int irq));
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void bsp_apic_configure __P((void));
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void init_secondary __P((void));
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void forward_statclock __P((void));
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void forwarded_statclock __P((struct trapframe frame));
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void forward_hardclock __P((void));
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void forwarded_hardclock __P((struct trapframe frame));
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void ipi_selected __P((u_int cpus, u_int ipi));
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void ipi_all __P((u_int ipi));
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void ipi_all_but_self __P((u_int ipi));
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void ipi_self __P((u_int ipi));
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#ifdef APIC_INTR_REORDER
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void set_lapic_isrloc __P((int, int));
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#endif /* APIC_INTR_REORDER */
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/* global data in mpapic.c */
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extern volatile lapic_t lapic;
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extern volatile ioapic_t **ioapic;
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/* functions in mpapic.c */
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void apic_dump __P((char*));
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void apic_initialize __P((void));
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void imen_dump __P((void));
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int apic_ipi __P((int, int, int));
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int selected_apic_ipi __P((u_int, int, int));
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int io_apic_setup __P((int));
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void io_apic_setup_intpin __P((int, int));
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void io_apic_set_id __P((int, int));
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int io_apic_get_id __P((int));
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int ext_int_setup __P((int, int));
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void set_apic_timer __P((int));
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int read_apic_timer __P((void));
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void u_sleep __P((int));
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u_int io_apic_read __P((int, int));
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void io_apic_write __P((int, int, u_int));
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#endif /* !LOCORE */
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#endif /* SMP && !APIC_IO */
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#endif /* _KERNEL */
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#endif /* _MACHINE_SMP_H_ */
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