7272f9cd77
ConnectX-6 DX. Currently TLS v1.2 and v1.3 with AES 128/256 crypto over TCP/IP (v4 and v6) is supported. A per PCI device UMA zone is used to manage the memory of the send tags. To optimize performance some crypto contexts may be cached by the UMA zone, until the UMA zone finishes the memory of the given send tag. An asynchronous task is used manage setup of the send tags towards the firmware. Most importantly setting the AES 128/256 bit pre-shared keys for the crypto context. Updating the state of the AES crypto engine and encrypting data, is all done in the fast path. Each send tag tracks the TCP sequence number in order to detect non-contiguous blocks of data, which may require a dump of prior unencrypted data, to restore the crypto state prior to wire transmission. Statistics counters have been added to count the amount of TLS data transmitted in total, and the amount of TLS data which has been dumped prior to transmission. When non-contiguous TCP sequence numbers are detected, the software needs to dump the beginning of the current TLS record up until the point of retransmission. All TLS counters utilize the counter(9) API. In order to enable hardware TLS offload the following sysctls must be set: kern.ipc.mb_use_ext_pgs=1 kern.ipc.tls.ifnet.permitted=1 kern.ipc.tls.enable=1 Sponsored by: Mellanox Technologies |
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| .. | ||
| en_hw_tls.h | ||
| en_rl.h | ||
| en.h | ||
| mlx5_en_dim.c | ||
| mlx5_en_ethtool.c | ||
| mlx5_en_flow_table.c | ||
| mlx5_en_hw_tls.c | ||
| mlx5_en_main.c | ||
| mlx5_en_port_buffer.c | ||
| mlx5_en_rl.c | ||
| mlx5_en_rx.c | ||
| mlx5_en_tx.c | ||
| mlx5_en_txrx.c | ||
| port_buffer.h | ||