5fcf252f41
by vmm.ko. This allows the virtual machine to be restarted without having to destroy it first. Reviewed by: grehan
1095 lines
23 KiB
C
1095 lines
23 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/sysctl.h>
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#include <sys/ioctl.h>
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#include <sys/mman.h>
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#include <sys/_iovec.h>
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#include <sys/cpuset.h>
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#include <machine/specialreg.h>
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#include <machine/param.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <assert.h>
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#include <string.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <libutil.h>
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#include <machine/vmm.h>
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#include <machine/vmm_dev.h>
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#include "vmmapi.h"
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#define MB (1024 * 1024UL)
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#define GB (1024 * 1024 * 1024UL)
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struct vmctx {
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int fd;
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uint32_t lowmem_limit;
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enum vm_mmap_style vms;
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int memflags;
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size_t lowmem;
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char *lowmem_addr;
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size_t highmem;
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char *highmem_addr;
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char *name;
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};
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#define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
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#define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
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static int
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vm_device_open(const char *name)
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{
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int fd, len;
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char *vmfile;
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len = strlen("/dev/vmm/") + strlen(name) + 1;
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vmfile = malloc(len);
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assert(vmfile != NULL);
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snprintf(vmfile, len, "/dev/vmm/%s", name);
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/* Open the device file */
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fd = open(vmfile, O_RDWR, 0);
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free(vmfile);
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return (fd);
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}
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int
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vm_create(const char *name)
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{
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return (CREATE((char *)name));
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}
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struct vmctx *
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vm_open(const char *name)
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{
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struct vmctx *vm;
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vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
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assert(vm != NULL);
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vm->fd = -1;
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vm->memflags = 0;
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vm->lowmem_limit = 3 * GB;
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vm->name = (char *)(vm + 1);
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strcpy(vm->name, name);
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if ((vm->fd = vm_device_open(vm->name)) < 0)
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goto err;
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return (vm);
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err:
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vm_destroy(vm);
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return (NULL);
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}
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void
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vm_destroy(struct vmctx *vm)
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{
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assert(vm != NULL);
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if (vm->fd >= 0)
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close(vm->fd);
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DESTROY(vm->name);
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free(vm);
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}
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int
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vm_parse_memsize(const char *optarg, size_t *ret_memsize)
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{
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char *endptr;
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size_t optval;
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int error;
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optval = strtoul(optarg, &endptr, 0);
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if (*optarg != '\0' && *endptr == '\0') {
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/*
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* For the sake of backward compatibility if the memory size
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* specified on the command line is less than a megabyte then
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* it is interpreted as being in units of MB.
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*/
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if (optval < MB)
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optval *= MB;
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*ret_memsize = optval;
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error = 0;
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} else
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error = expand_number(optarg, ret_memsize);
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return (error);
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}
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int
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vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa, size_t *ret_len,
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int *wired)
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{
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int error;
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struct vm_memory_segment seg;
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bzero(&seg, sizeof(seg));
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seg.gpa = gpa;
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error = ioctl(ctx->fd, VM_GET_MEMORY_SEG, &seg);
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*ret_len = seg.len;
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if (wired != NULL)
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*wired = seg.wired;
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return (error);
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}
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uint32_t
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vm_get_lowmem_limit(struct vmctx *ctx)
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{
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return (ctx->lowmem_limit);
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}
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void
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vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
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{
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ctx->lowmem_limit = limit;
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}
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void
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vm_set_memflags(struct vmctx *ctx, int flags)
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{
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ctx->memflags = flags;
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}
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static int
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setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char **addr)
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{
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int error, mmap_flags;
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struct vm_memory_segment seg;
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/*
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* Create and optionally map 'len' bytes of memory at guest
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* physical address 'gpa'
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*/
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bzero(&seg, sizeof(seg));
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seg.gpa = gpa;
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seg.len = len;
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error = ioctl(ctx->fd, VM_MAP_MEMORY, &seg);
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if (error == 0 && addr != NULL) {
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mmap_flags = MAP_SHARED;
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if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
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mmap_flags |= MAP_NOCORE;
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*addr = mmap(NULL, len, PROT_READ | PROT_WRITE, mmap_flags,
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ctx->fd, gpa);
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}
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return (error);
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}
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int
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vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
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{
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char **addr;
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int error;
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/* XXX VM_MMAP_SPARSE not implemented yet */
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assert(vms == VM_MMAP_NONE || vms == VM_MMAP_ALL);
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ctx->vms = vms;
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/*
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* If 'memsize' cannot fit entirely in the 'lowmem' segment then
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* create another 'highmem' segment above 4GB for the remainder.
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*/
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if (memsize > ctx->lowmem_limit) {
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ctx->lowmem = ctx->lowmem_limit;
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ctx->highmem = memsize - ctx->lowmem;
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} else {
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ctx->lowmem = memsize;
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ctx->highmem = 0;
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}
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if (ctx->lowmem > 0) {
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addr = (vms == VM_MMAP_ALL) ? &ctx->lowmem_addr : NULL;
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error = setup_memory_segment(ctx, 0, ctx->lowmem, addr);
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if (error)
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return (error);
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}
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if (ctx->highmem > 0) {
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addr = (vms == VM_MMAP_ALL) ? &ctx->highmem_addr : NULL;
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error = setup_memory_segment(ctx, 4*GB, ctx->highmem, addr);
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if (error)
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return (error);
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}
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return (0);
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}
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void *
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vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
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{
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/* XXX VM_MMAP_SPARSE not implemented yet */
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assert(ctx->vms == VM_MMAP_ALL);
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if (gaddr < ctx->lowmem && gaddr + len <= ctx->lowmem)
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return ((void *)(ctx->lowmem_addr + gaddr));
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if (gaddr >= 4*GB) {
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gaddr -= 4*GB;
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if (gaddr < ctx->highmem && gaddr + len <= ctx->highmem)
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return ((void *)(ctx->highmem_addr + gaddr));
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}
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return (NULL);
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}
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int
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vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
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uint64_t base, uint32_t limit, uint32_t access)
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{
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int error;
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struct vm_seg_desc vmsegdesc;
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bzero(&vmsegdesc, sizeof(vmsegdesc));
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vmsegdesc.cpuid = vcpu;
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vmsegdesc.regnum = reg;
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vmsegdesc.desc.base = base;
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vmsegdesc.desc.limit = limit;
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vmsegdesc.desc.access = access;
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error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
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return (error);
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}
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int
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vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
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uint64_t *base, uint32_t *limit, uint32_t *access)
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{
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int error;
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struct vm_seg_desc vmsegdesc;
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bzero(&vmsegdesc, sizeof(vmsegdesc));
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vmsegdesc.cpuid = vcpu;
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vmsegdesc.regnum = reg;
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error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
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if (error == 0) {
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*base = vmsegdesc.desc.base;
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*limit = vmsegdesc.desc.limit;
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*access = vmsegdesc.desc.access;
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}
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return (error);
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}
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int
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vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
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{
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int error;
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struct vm_register vmreg;
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bzero(&vmreg, sizeof(vmreg));
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vmreg.cpuid = vcpu;
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vmreg.regnum = reg;
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vmreg.regval = val;
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error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
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return (error);
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}
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int
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vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
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{
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int error;
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struct vm_register vmreg;
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bzero(&vmreg, sizeof(vmreg));
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vmreg.cpuid = vcpu;
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vmreg.regnum = reg;
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error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
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*ret_val = vmreg.regval;
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return (error);
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}
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int
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vm_run(struct vmctx *ctx, int vcpu, uint64_t rip, struct vm_exit *vmexit)
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{
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int error;
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struct vm_run vmrun;
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bzero(&vmrun, sizeof(vmrun));
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vmrun.cpuid = vcpu;
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vmrun.rip = rip;
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error = ioctl(ctx->fd, VM_RUN, &vmrun);
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bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
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return (error);
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}
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int
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vm_suspend(struct vmctx *ctx, enum vm_suspend_how how)
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{
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struct vm_suspend vmsuspend;
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bzero(&vmsuspend, sizeof(vmsuspend));
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vmsuspend.how = how;
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return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend));
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}
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int
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vm_reinit(struct vmctx *ctx)
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{
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return (ioctl(ctx->fd, VM_REINIT, 0));
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}
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static int
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vm_inject_exception_real(struct vmctx *ctx, int vcpu, int vector,
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int error_code, int error_code_valid)
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{
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struct vm_exception exc;
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bzero(&exc, sizeof(exc));
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exc.cpuid = vcpu;
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exc.vector = vector;
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exc.error_code = error_code;
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exc.error_code_valid = error_code_valid;
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return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc));
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}
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int
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vm_inject_exception(struct vmctx *ctx, int vcpu, int vector)
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{
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return (vm_inject_exception_real(ctx, vcpu, vector, 0, 0));
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}
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int
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vm_inject_exception2(struct vmctx *ctx, int vcpu, int vector, int errcode)
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{
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return (vm_inject_exception_real(ctx, vcpu, vector, errcode, 1));
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}
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int
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vm_apicid2vcpu(struct vmctx *ctx, int apicid)
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{
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/*
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* The apic id associated with the 'vcpu' has the same numerical value
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* as the 'vcpu' itself.
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*/
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return (apicid);
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}
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int
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vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
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{
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struct vm_lapic_irq vmirq;
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bzero(&vmirq, sizeof(vmirq));
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vmirq.cpuid = vcpu;
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vmirq.vector = vector;
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return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
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}
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int
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vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
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{
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struct vm_lapic_irq vmirq;
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bzero(&vmirq, sizeof(vmirq));
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vmirq.cpuid = vcpu;
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vmirq.vector = vector;
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return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
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}
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int
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vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
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{
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struct vm_lapic_msi vmmsi;
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bzero(&vmmsi, sizeof(vmmsi));
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vmmsi.addr = addr;
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vmmsi.msg = msg;
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return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
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}
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int
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vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
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{
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struct vm_ioapic_irq ioapic_irq;
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bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
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ioapic_irq.irq = irq;
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return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
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}
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int
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vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
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{
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struct vm_ioapic_irq ioapic_irq;
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bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
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ioapic_irq.irq = irq;
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return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
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}
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int
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vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
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{
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struct vm_ioapic_irq ioapic_irq;
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bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
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ioapic_irq.irq = irq;
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return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
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}
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int
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vm_ioapic_pincount(struct vmctx *ctx, int *pincount)
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{
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return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount));
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}
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int
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vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
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{
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struct vm_isa_irq isa_irq;
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bzero(&isa_irq, sizeof(struct vm_isa_irq));
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isa_irq.atpic_irq = atpic_irq;
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isa_irq.ioapic_irq = ioapic_irq;
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return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq));
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}
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int
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vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
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{
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struct vm_isa_irq isa_irq;
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bzero(&isa_irq, sizeof(struct vm_isa_irq));
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isa_irq.atpic_irq = atpic_irq;
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isa_irq.ioapic_irq = ioapic_irq;
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return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq));
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}
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int
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vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
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{
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struct vm_isa_irq isa_irq;
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bzero(&isa_irq, sizeof(struct vm_isa_irq));
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isa_irq.atpic_irq = atpic_irq;
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isa_irq.ioapic_irq = ioapic_irq;
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return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq));
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}
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int
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vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
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enum vm_intr_trigger trigger)
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{
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struct vm_isa_irq_trigger isa_irq_trigger;
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bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger));
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isa_irq_trigger.atpic_irq = atpic_irq;
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isa_irq_trigger.trigger = trigger;
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return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger));
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}
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int
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vm_inject_nmi(struct vmctx *ctx, int vcpu)
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{
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struct vm_nmi vmnmi;
|
|
|
|
bzero(&vmnmi, sizeof(vmnmi));
|
|
vmnmi.cpuid = vcpu;
|
|
|
|
return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
|
|
}
|
|
|
|
static struct {
|
|
const char *name;
|
|
int type;
|
|
} capstrmap[] = {
|
|
{ "hlt_exit", VM_CAP_HALT_EXIT },
|
|
{ "mtrap_exit", VM_CAP_MTRAP_EXIT },
|
|
{ "pause_exit", VM_CAP_PAUSE_EXIT },
|
|
{ "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST },
|
|
{ "enable_invpcid", VM_CAP_ENABLE_INVPCID },
|
|
{ 0 }
|
|
};
|
|
|
|
int
|
|
vm_capability_name2type(const char *capname)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) {
|
|
if (strcmp(capstrmap[i].name, capname) == 0)
|
|
return (capstrmap[i].type);
|
|
}
|
|
|
|
return (-1);
|
|
}
|
|
|
|
const char *
|
|
vm_capability_type2name(int type)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; capstrmap[i].name != NULL; i++) {
|
|
if (capstrmap[i].type == type)
|
|
return (capstrmap[i].name);
|
|
}
|
|
|
|
return (NULL);
|
|
}
|
|
|
|
int
|
|
vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
|
|
int *retval)
|
|
{
|
|
int error;
|
|
struct vm_capability vmcap;
|
|
|
|
bzero(&vmcap, sizeof(vmcap));
|
|
vmcap.cpuid = vcpu;
|
|
vmcap.captype = cap;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
|
|
*retval = vmcap.capval;
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
|
|
{
|
|
struct vm_capability vmcap;
|
|
|
|
bzero(&vmcap, sizeof(vmcap));
|
|
vmcap.cpuid = vcpu;
|
|
vmcap.captype = cap;
|
|
vmcap.capval = val;
|
|
|
|
return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
|
|
}
|
|
|
|
int
|
|
vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
|
|
{
|
|
struct vm_pptdev pptdev;
|
|
|
|
bzero(&pptdev, sizeof(pptdev));
|
|
pptdev.bus = bus;
|
|
pptdev.slot = slot;
|
|
pptdev.func = func;
|
|
|
|
return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
|
|
}
|
|
|
|
int
|
|
vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
|
|
{
|
|
struct vm_pptdev pptdev;
|
|
|
|
bzero(&pptdev, sizeof(pptdev));
|
|
pptdev.bus = bus;
|
|
pptdev.slot = slot;
|
|
pptdev.func = func;
|
|
|
|
return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
|
|
}
|
|
|
|
int
|
|
vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
|
|
vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
|
|
{
|
|
struct vm_pptdev_mmio pptmmio;
|
|
|
|
bzero(&pptmmio, sizeof(pptmmio));
|
|
pptmmio.bus = bus;
|
|
pptmmio.slot = slot;
|
|
pptmmio.func = func;
|
|
pptmmio.gpa = gpa;
|
|
pptmmio.len = len;
|
|
pptmmio.hpa = hpa;
|
|
|
|
return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
|
|
}
|
|
|
|
int
|
|
vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
|
|
uint64_t addr, uint64_t msg, int numvec)
|
|
{
|
|
struct vm_pptdev_msi pptmsi;
|
|
|
|
bzero(&pptmsi, sizeof(pptmsi));
|
|
pptmsi.vcpu = vcpu;
|
|
pptmsi.bus = bus;
|
|
pptmsi.slot = slot;
|
|
pptmsi.func = func;
|
|
pptmsi.msg = msg;
|
|
pptmsi.addr = addr;
|
|
pptmsi.numvec = numvec;
|
|
|
|
return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
|
|
}
|
|
|
|
int
|
|
vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
|
|
int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
|
|
{
|
|
struct vm_pptdev_msix pptmsix;
|
|
|
|
bzero(&pptmsix, sizeof(pptmsix));
|
|
pptmsix.vcpu = vcpu;
|
|
pptmsix.bus = bus;
|
|
pptmsix.slot = slot;
|
|
pptmsix.func = func;
|
|
pptmsix.idx = idx;
|
|
pptmsix.msg = msg;
|
|
pptmsix.addr = addr;
|
|
pptmsix.vector_control = vector_control;
|
|
|
|
return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
|
|
}
|
|
|
|
uint64_t *
|
|
vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
|
|
int *ret_entries)
|
|
{
|
|
int error;
|
|
|
|
static struct vm_stats vmstats;
|
|
|
|
vmstats.cpuid = vcpu;
|
|
|
|
error = ioctl(ctx->fd, VM_STATS, &vmstats);
|
|
if (error == 0) {
|
|
if (ret_entries)
|
|
*ret_entries = vmstats.num_entries;
|
|
if (ret_tv)
|
|
*ret_tv = vmstats.tv;
|
|
return (vmstats.statbuf);
|
|
} else
|
|
return (NULL);
|
|
}
|
|
|
|
const char *
|
|
vm_get_stat_desc(struct vmctx *ctx, int index)
|
|
{
|
|
static struct vm_stat_desc statdesc;
|
|
|
|
statdesc.index = index;
|
|
if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
|
|
return (statdesc.desc);
|
|
else
|
|
return (NULL);
|
|
}
|
|
|
|
int
|
|
vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
|
|
{
|
|
int error;
|
|
struct vm_x2apic x2apic;
|
|
|
|
bzero(&x2apic, sizeof(x2apic));
|
|
x2apic.cpuid = vcpu;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
|
|
*state = x2apic.state;
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
|
|
{
|
|
int error;
|
|
struct vm_x2apic x2apic;
|
|
|
|
bzero(&x2apic, sizeof(x2apic));
|
|
x2apic.cpuid = vcpu;
|
|
x2apic.state = state;
|
|
|
|
error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
|
|
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* From Intel Vol 3a:
|
|
* Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
|
|
*/
|
|
int
|
|
vcpu_reset(struct vmctx *vmctx, int vcpu)
|
|
{
|
|
int error;
|
|
uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
|
|
uint32_t desc_access, desc_limit;
|
|
uint16_t sel;
|
|
|
|
zero = 0;
|
|
|
|
rflags = 0x2;
|
|
error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
|
|
if (error)
|
|
goto done;
|
|
|
|
rip = 0xfff0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
|
|
goto done;
|
|
|
|
cr0 = CR0_NE;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
|
|
goto done;
|
|
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
|
|
goto done;
|
|
|
|
cr4 = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
|
|
goto done;
|
|
|
|
/*
|
|
* CS: present, r/w, accessed, 16-bit, byte granularity, usable
|
|
*/
|
|
desc_base = 0xffff0000;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x0093;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0xf000;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
|
|
goto done;
|
|
|
|
/*
|
|
* SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
|
|
*/
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x0093;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
|
|
goto done;
|
|
|
|
/* General purpose registers */
|
|
rdx = 0xf00;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
|
|
goto done;
|
|
|
|
/* GDTR, IDTR */
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error != 0)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error != 0)
|
|
goto done;
|
|
|
|
/* TR */
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x0000008b;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
|
|
goto done;
|
|
|
|
/* LDTR */
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x00000082;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
|
|
desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
|
|
goto done;
|
|
|
|
/* XXX cr2, debug registers */
|
|
|
|
error = 0;
|
|
done:
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
|
|
{
|
|
int error, i;
|
|
struct vm_gpa_pte gpapte;
|
|
|
|
bzero(&gpapte, sizeof(gpapte));
|
|
gpapte.gpa = gpa;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
|
|
|
|
if (error == 0) {
|
|
*num = gpapte.ptenum;
|
|
for (i = 0; i < gpapte.ptenum; i++)
|
|
pte[i] = gpapte.pte[i];
|
|
}
|
|
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
|
|
{
|
|
int error;
|
|
struct vm_hpet_cap cap;
|
|
|
|
bzero(&cap, sizeof(struct vm_hpet_cap));
|
|
error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
|
|
if (capabilities != NULL)
|
|
*capabilities = cap.capabilities;
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
|
|
uint64_t gla, int prot, int *fault, uint64_t *gpa)
|
|
{
|
|
struct vm_gla2gpa gg;
|
|
int error;
|
|
|
|
bzero(&gg, sizeof(struct vm_gla2gpa));
|
|
gg.vcpuid = vcpu;
|
|
gg.prot = prot;
|
|
gg.gla = gla;
|
|
gg.paging = *paging;
|
|
|
|
error = ioctl(ctx->fd, VM_GLA2GPA, &gg);
|
|
if (error == 0) {
|
|
*fault = gg.fault;
|
|
*gpa = gg.gpa;
|
|
}
|
|
return (error);
|
|
}
|
|
|
|
#ifndef min
|
|
#define min(a,b) (((a) < (b)) ? (a) : (b))
|
|
#endif
|
|
|
|
int
|
|
vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
|
|
uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt)
|
|
{
|
|
uint64_t gpa;
|
|
int error, fault, i, n, off;
|
|
|
|
for (i = 0; i < iovcnt; i++) {
|
|
iov[i].iov_base = 0;
|
|
iov[i].iov_len = 0;
|
|
}
|
|
|
|
while (len) {
|
|
assert(iovcnt > 0);
|
|
error = gla2gpa(ctx, vcpu, paging, gla, prot, &fault, &gpa);
|
|
if (error)
|
|
return (-1);
|
|
if (fault)
|
|
return (1);
|
|
|
|
off = gpa & PAGE_MASK;
|
|
n = min(len, PAGE_SIZE - off);
|
|
|
|
iov->iov_base = (void *)gpa;
|
|
iov->iov_len = n;
|
|
iov++;
|
|
iovcnt--;
|
|
|
|
gla += n;
|
|
len -= n;
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len)
|
|
{
|
|
const char *src;
|
|
char *dst;
|
|
uint64_t gpa;
|
|
size_t n;
|
|
|
|
dst = vp;
|
|
while (len) {
|
|
assert(iov->iov_len);
|
|
gpa = (uint64_t)iov->iov_base;
|
|
n = min(len, iov->iov_len);
|
|
src = vm_map_gpa(ctx, gpa, n);
|
|
bcopy(src, dst, n);
|
|
|
|
iov++;
|
|
dst += n;
|
|
len -= n;
|
|
}
|
|
}
|
|
|
|
void
|
|
vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov,
|
|
size_t len)
|
|
{
|
|
const char *src;
|
|
char *dst;
|
|
uint64_t gpa;
|
|
size_t n;
|
|
|
|
src = vp;
|
|
while (len) {
|
|
assert(iov->iov_len);
|
|
gpa = (uint64_t)iov->iov_base;
|
|
n = min(len, iov->iov_len);
|
|
dst = vm_map_gpa(ctx, gpa, n);
|
|
bcopy(src, dst, n);
|
|
|
|
iov++;
|
|
src += n;
|
|
len -= n;
|
|
}
|
|
}
|
|
|
|
static int
|
|
vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus)
|
|
{
|
|
struct vm_cpuset vm_cpuset;
|
|
int error;
|
|
|
|
bzero(&vm_cpuset, sizeof(struct vm_cpuset));
|
|
vm_cpuset.which = which;
|
|
vm_cpuset.cpusetsize = sizeof(cpuset_t);
|
|
vm_cpuset.cpus = cpus;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus)
|
|
{
|
|
|
|
return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus));
|
|
}
|
|
|
|
int
|
|
vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus)
|
|
{
|
|
|
|
return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus));
|
|
}
|
|
|
|
int
|
|
vm_activate_cpu(struct vmctx *ctx, int vcpu)
|
|
{
|
|
struct vm_activate_cpu ac;
|
|
int error;
|
|
|
|
bzero(&ac, sizeof(struct vm_activate_cpu));
|
|
ac.vcpuid = vcpu;
|
|
error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac);
|
|
return (error);
|
|
}
|