8f1562430f
Add PCI IDs for Intel Apollo Lake Series HSUARTs:
# pciconf -ll
drv selector class rev hdr vendor device subven subdev
uart0@pci0:0:24:0: 118000 0b 00 8086 5abc 8086 7270
uart1@pci0:0:24:1: 118000 0b 00 8086 5abe 8086 7270
uart2@pci0:0:24:2: 118000 0b 00 8086 5ac0 8086 7270
uart3@pci0:0:24:3: 118000 0b 00 8086 5aee 8086 7270
NB (Intel Document Number 336256-004US):
1. The E3900 and A3900 Series Processors support four LPSS_UART ports,
while the N- and J- Series Processors support only LPSS_UART [2:1]
ports.
2. The LPSS_UART1 port is dedicated for discrete Global Navigation
Satellite System (GNSS). This port can be used for generic UART
functionality if GNSS is not used.
3. The LPSS_UART2 port is dedicated for host OS debug.
4. The LPSS_UART0 and LPSS_UART3 ports are for generic UART functionality.
5. Only UART [1:0] ports support DMA.
PR: 255556
Submitted by: Jose Luis Duran <jlduran@gmail.com>
MFC after: 1 week
267 lines
9.7 KiB
C
267 lines
9.7 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2006 Marcel Moolenaar All rights reserved.
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* Copyright (c) 2001 M. Warner Losh <imp@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/pci/pcivar.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_bus.h>
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#define DEFAULT_RCLK 1843200
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static int uart_pci_probe(device_t dev);
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static int uart_pci_attach(device_t dev);
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static int uart_pci_detach(device_t dev);
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static device_method_t uart_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, uart_pci_probe),
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DEVMETHOD(device_attach, uart_pci_attach),
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DEVMETHOD(device_detach, uart_pci_detach),
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DEVMETHOD(device_resume, uart_bus_resume),
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DEVMETHOD_END
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};
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static driver_t uart_pci_driver = {
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uart_driver_name,
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uart_pci_methods,
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sizeof(struct uart_softc),
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};
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struct pci_id {
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uint16_t vendor;
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uint16_t device;
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uint16_t subven;
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uint16_t subdev;
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const char *desc;
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int rid;
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int rclk;
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int regshft;
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};
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static const struct pci_id pci_ns8250_ids[] = {
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{ 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14,
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128 * DEFAULT_RCLK },
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{ 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14,
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128 * DEFAULT_RCLK },
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{ 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 },
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{ 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 },
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{ 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2",
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0x10 },
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{ 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 },
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{ 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 },
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{ 0x103c, 0x3301, 0xffff, 0, "HP iLO serial port", 0x10 },
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{ 0x11c1, 0x0480, 0xffff, 0, "Agere Systems Venus Modem (V90, 56KFlex)", 0x14 },
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{ 0x115d, 0x0103, 0xffff, 0, "Xircom Cardbus Ethernet + 56k Modem", 0x10 },
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{ 0x125b, 0x9100, 0xa000, 0x1000,
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"ASIX AX99100 PCIe 1/2/3/4-port RS-232/422/485", 0x10 },
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{ 0x1282, 0x6585, 0xffff, 0, "Davicom 56PDV PCI Modem", 0x10 },
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{ 0x12b9, 0x1008, 0xffff, 0, "3Com 56K FaxModem Model 5610", 0x10 },
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{ 0x131f, 0x1000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x18 },
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{ 0x131f, 0x1001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x18 },
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{ 0x131f, 0x1002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x18 },
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{ 0x131f, 0x2000, 0xffff, 0, "Siig CyberSerial (1-port) 16550", 0x10 },
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{ 0x131f, 0x2001, 0xffff, 0, "Siig CyberSerial (1-port) 16650", 0x10 },
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{ 0x131f, 0x2002, 0xffff, 0, "Siig CyberSerial (1-port) 16850", 0x10 },
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{ 0x135c, 0x0190, 0xffff, 0, "Quatech SSCLP-100", 0x18 },
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{ 0x135c, 0x01c0, 0xffff, 0, "Quatech SSCLP-200/300", 0x18 },
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{ 0x135e, 0x7101, 0xffff, 0, "Sealevel Systems Single Port RS-232/422/485/530",
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0x18 },
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{ 0x1407, 0x0110, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port A", 0x10 },
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{ 0x1407, 0x0111, 0xffff, 0, "Lava Computer mfg DSerial-PCI Port B", 0x10 },
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{ 0x1407, 0x0510, 0xffff, 0, "Lava SP Serial 550 PCI", 0x10 },
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{ 0x1409, 0x7168, 0x1409, 0x4025, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1409, 0x7168, 0x1409, 0x4027, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1409, 0x7168, 0x1409, 0x4028, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1409, 0x7168, 0x1409, 0x5025, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1409, 0x7168, 0x1409, 0x5027, "Timedia Technology Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x1415, 0x950b, 0xffff, 0, "Oxford Semiconductor OXCB950 Cardbus 16950 UART",
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0x10, 16384000 },
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{ 0x1415, 0xc120, 0xffff, 0, "Oxford Semiconductor OXPCIe952 PCIe 16950 UART",
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0x10 },
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{ 0x14e4, 0x160a, 0xffff, 0, "Broadcom TruManage UART", 0x10,
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128 * DEFAULT_RCLK, 2},
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{ 0x14e4, 0x4344, 0xffff, 0, "Sony Ericsson GC89 PC Card", 0x10},
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{ 0x151f, 0x0000, 0xffff, 0, "TOPIC Semiconductor TP560 56k modem", 0x10 },
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{ 0x1d0f, 0x8250, 0x0000, 0, "Amazon PCI serial device", 0x10 },
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{ 0x1d0f, 0x8250, 0x1d0f, 0, "Amazon PCI serial device", 0x10 },
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{ 0x1fd4, 0x1999, 0x1fd4, 0x0001, "Sunix SER5xxxx Serial Port", 0x10,
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8 * DEFAULT_RCLK },
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{ 0x8086, 0x0f0a, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#1", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x0f0c, 0xffff, 0, "Intel ValleyView LPIO1 HSUART#2", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x108f, 0xffff, 0, "Intel AMT - SOL", 0x10 },
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{ 0x8086, 0x19d8, 0xffff, 0, "Intel Denverton UART", 0x10 },
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{ 0x8086, 0x1c3d, 0xffff, 0, "Intel AMT - KT Controller", 0x10 },
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{ 0x8086, 0x1d3d, 0xffff, 0, "Intel C600/X79 Series Chipset KT Controller",
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0x10 },
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{ 0x8086, 0x1e3d, 0xffff, 0, "Intel Panther Point KT Controller", 0x10 },
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{ 0x8086, 0x228a, 0xffff, 0, "Intel Cherryview SIO HSUART#1", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x228c, 0xffff, 0, "Intel Cherryview SIO HSUART#2", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x2a07, 0xffff, 0, "Intel AMT - PM965/GM965 KT Controller", 0x10 },
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{ 0x8086, 0x2a47, 0xffff, 0, "Mobile 4 Series Chipset KT Controller", 0x10 },
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{ 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 },
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{ 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller",
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0x10 },
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{ 0x8086, 0x5abc, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 0", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x5abe, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 1", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x5ac0, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 2", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x5aee, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 3", 0x10,
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24 * DEFAULT_RCLK, 2 },
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{ 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 },
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{ 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 },
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{ 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },
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{ 0x8086, 0x8814, 0xffff, 0, "Intel EG20T Serial Port 3", 0x10 },
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{ 0x8086, 0x8c3d, 0xffff, 0, "Intel Lynx Point KT Controller", 0x10 },
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{ 0x8086, 0x8cbd, 0xffff, 0, "Intel Wildcat Point KT Controller", 0x10 },
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{ 0x8086, 0x9c3d, 0xffff, 0, "Intel Lynx Point-LP HECI KT", 0x10 },
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{ 0x9710, 0x9820, 0x1000, 1, "NetMos NM9820 Serial Port", 0x10 },
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{ 0x9710, 0x9835, 0x1000, 1, "NetMos NM9835 Serial Port", 0x10 },
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{ 0x9710, 0x9865, 0xa000, 0x1000, "NetMos NM9865 Serial Port", 0x10 },
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{ 0x9710, 0x9900, 0xa000, 0x1000,
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"MosChip MCS9900 PCIe to Peripheral Controller", 0x10 },
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{ 0x9710, 0x9901, 0xa000, 0x1000,
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"MosChip MCS9901 PCIe to Peripheral Controller", 0x10 },
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{ 0x9710, 0x9904, 0xa000, 0x1000,
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"MosChip MCS9904 PCIe to Peripheral Controller", 0x10 },
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{ 0x9710, 0x9922, 0xa000, 0x1000,
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"MosChip MCS9922 PCIe to Peripheral Controller", 0x10 },
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{ 0xdeaf, 0x9051, 0xffff, 0, "Middle Digital PC Weasel Serial Port", 0x10 },
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{ 0xffff, 0, 0xffff, 0, NULL, 0, 0}
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};
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const static struct pci_id *
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uart_pci_match(device_t dev, const struct pci_id *id)
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{
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uint16_t device, subdev, subven, vendor;
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vendor = pci_get_vendor(dev);
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device = pci_get_device(dev);
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while (id->vendor != 0xffff &&
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(id->vendor != vendor || id->device != device))
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id++;
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if (id->vendor == 0xffff)
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return (NULL);
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if (id->subven == 0xffff)
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return (id);
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subven = pci_get_subvendor(dev);
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subdev = pci_get_subdevice(dev);
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while (id->vendor == vendor && id->device == device &&
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(id->subven != subven || id->subdev != subdev))
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id++;
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return ((id->vendor == vendor && id->device == device) ? id : NULL);
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}
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static int
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uart_pci_probe(device_t dev)
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{
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struct uart_softc *sc;
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const struct pci_id *id;
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int result;
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sc = device_get_softc(dev);
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id = uart_pci_match(dev, pci_ns8250_ids);
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if (id != NULL) {
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sc->sc_class = &uart_ns8250_class;
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goto match;
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}
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/* Add checks for non-ns8250 IDs here. */
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return (ENXIO);
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match:
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result = uart_bus_probe(dev, id->regshft, 0, id->rclk, id->rid, 0, 0);
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/* Bail out on error. */
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if (result > 0)
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return (result);
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/* Set/override the device description. */
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if (id->desc)
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device_set_desc(dev, id->desc);
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return (result);
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}
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static int
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uart_pci_attach(device_t dev)
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{
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struct uart_softc *sc;
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int count;
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sc = device_get_softc(dev);
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/*
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* Use MSI in preference to legacy IRQ if available. However, experience
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* suggests this is only reliable when one MSI vector is advertised.
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*/
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if (pci_msi_count(dev) == 1) {
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count = 1;
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if (pci_alloc_msi(dev, &count) == 0) {
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sc->sc_irid = 1;
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device_printf(dev, "Using %d MSI message\n", count);
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}
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}
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return (uart_bus_attach(dev));
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}
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static int
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uart_pci_detach(device_t dev)
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{
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struct uart_softc *sc;
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sc = device_get_softc(dev);
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if (sc->sc_irid != 0)
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pci_release_msi(dev);
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return (uart_bus_detach(dev));
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}
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DRIVER_MODULE(uart, pci, uart_pci_driver, uart_devclass, NULL, NULL);
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