e7a9df16e6
Skylake Xeons. See SDM rev. 68 Vol 3 4.6.2 Protection Keys and the description of the RDPKRU and WRPKRU instructions. Reviewed by: markj Tested by: pho Sponsored by: The FreeBSD Foundation MFC after: 2 weeks Differential revision: https://reviews.freebsd.org/D18893
181 lines
5.5 KiB
C
181 lines
5.5 KiB
C
/*-
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* Copyright (c) 1991 Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and William Jolitz of UUNET Technologies Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PMAP_H_
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#define _MACHINE_PMAP_H_
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#include <machine/pte.h>
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#ifndef LOCORE
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#include <sys/queue.h>
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#include <sys/_cpuset.h>
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#include <sys/_lock.h>
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#include <sys/_mutex.h>
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#include <vm/_vm_radix.h>
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#ifdef _KERNEL
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#define vtophys(va) pmap_kextract((vm_offset_t)(va))
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#endif
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#define pmap_page_get_memattr(m) ((m)->md.pv_memattr)
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#define pmap_page_is_write_mapped(m) (((m)->aflags & PGA_WRITEABLE) != 0)
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void pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma);
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/*
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* Pmap stuff
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*/
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struct md_page {
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TAILQ_HEAD(,pv_entry) pv_list;
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int pv_gen;
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vm_memattr_t pv_memattr;
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};
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/*
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* This structure is used to hold a virtual<->physical address
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* association and is used mostly by bootstrap code
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*/
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struct pv_addr {
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SLIST_ENTRY(pv_addr) pv_list;
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vm_offset_t pv_va;
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vm_paddr_t pv_pa;
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};
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struct pmap {
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struct mtx pm_mtx;
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struct pmap_statistics pm_stats; /* pmap statictics */
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pd_entry_t *pm_l1;
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u_long pm_satp; /* value for SATP register */
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cpuset_t pm_active; /* active on cpus */
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TAILQ_HEAD(,pv_chunk) pm_pvchunk; /* list of mappings in pmap */
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LIST_ENTRY(pmap) pm_list; /* List of all pmaps */
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struct vm_radix pm_root;
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};
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typedef struct pv_entry {
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vm_offset_t pv_va; /* virtual address for mapping */
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TAILQ_ENTRY(pv_entry) pv_next;
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} *pv_entry_t;
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/*
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* pv_entries are allocated in chunks per-process. This avoids the
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* need to track per-pmap assignments.
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*/
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#define _NPCM 3
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#define _NPCPV 168
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struct pv_chunk {
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struct pmap * pc_pmap;
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TAILQ_ENTRY(pv_chunk) pc_list;
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uint64_t pc_map[_NPCM]; /* bitmap; 1 = free */
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TAILQ_ENTRY(pv_chunk) pc_lru;
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struct pv_entry pc_pventry[_NPCPV];
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};
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typedef struct pmap *pmap_t;
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#ifdef _KERNEL
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extern struct pmap kernel_pmap_store;
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#define kernel_pmap (&kernel_pmap_store)
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#define pmap_kernel() kernel_pmap
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#define PMAP_ASSERT_LOCKED(pmap) \
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mtx_assert(&(pmap)->pm_mtx, MA_OWNED)
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#define PMAP_LOCK(pmap) mtx_lock(&(pmap)->pm_mtx)
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#define PMAP_LOCK_ASSERT(pmap, type) \
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mtx_assert(&(pmap)->pm_mtx, (type))
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#define PMAP_LOCK_DESTROY(pmap) mtx_destroy(&(pmap)->pm_mtx)
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#define PMAP_LOCK_INIT(pmap) mtx_init(&(pmap)->pm_mtx, "pmap", \
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NULL, MTX_DEF | MTX_DUPOK)
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#define PMAP_OWNED(pmap) mtx_owned(&(pmap)->pm_mtx)
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#define PMAP_MTX(pmap) (&(pmap)->pm_mtx)
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#define PMAP_TRYLOCK(pmap) mtx_trylock(&(pmap)->pm_mtx)
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#define PMAP_UNLOCK(pmap) mtx_unlock(&(pmap)->pm_mtx)
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#define PHYS_AVAIL_SIZE 10
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extern vm_paddr_t phys_avail[];
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extern vm_paddr_t dump_avail[];
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extern vm_offset_t virtual_avail;
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extern vm_offset_t virtual_end;
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/*
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* Macros to test if a mapping is mappable with an L1 Section mapping
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* or an L2 Large Page mapping.
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*/
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#define L1_MAPPABLE_P(va, pa, size) \
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((((va) | (pa)) & L1_OFFSET) == 0 && (size) >= L1_SIZE)
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struct thread;
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void pmap_activate_boot(pmap_t);
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void pmap_activate_sw(struct thread *);
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void pmap_bootstrap(vm_offset_t, vm_paddr_t, vm_size_t);
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void pmap_kenter_device(vm_offset_t, vm_size_t, vm_paddr_t);
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vm_paddr_t pmap_kextract(vm_offset_t va);
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void pmap_kremove(vm_offset_t);
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void pmap_kremove_device(vm_offset_t, vm_size_t);
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bool pmap_ps_enabled(pmap_t);
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void *pmap_mapdev(vm_offset_t, vm_size_t);
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void *pmap_mapbios(vm_paddr_t, vm_size_t);
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void pmap_unmapdev(vm_offset_t, vm_size_t);
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void pmap_unmapbios(vm_offset_t, vm_size_t);
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boolean_t pmap_map_io_transient(vm_page_t *, vm_offset_t *, int, boolean_t);
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void pmap_unmap_io_transient(vm_page_t *, vm_offset_t *, int, boolean_t);
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bool pmap_get_tables(pmap_t, vm_offset_t, pd_entry_t **, pd_entry_t **,
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pt_entry_t **);
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#define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list))
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int pmap_fault_fixup(pmap_t, vm_offset_t, vm_prot_t);
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static inline int
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pmap_vmspace_copy(pmap_t dst_pmap __unused, pmap_t src_pmap __unused)
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{
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return (0);
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}
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#endif /* _KERNEL */
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#endif /* !LOCORE */
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#endif /* !_MACHINE_PMAP_H_ */
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