3c60ba66c4
Bus Protocol 2:SCSI over IEEE1394) support for CAM.
75 lines
2.2 KiB
C
75 lines
2.2 KiB
C
/*
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* Copyright (c) 1998-2001 Katsushi Kobayashi and Hidetoshi Shimokawa
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the acknowledgement as bellow:
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*
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* This product includes software developed by K. Kobayashi and H. Shimokawa
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*
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*
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*/
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struct ciphdr {
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#if BYTE_ORDER == LITTLE_ENDIAN
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u_int32_t src:8,
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len:8,
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dummy:8,
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dbc:8;
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u_int32_t :16,
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cyc:16;
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#else
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u_int32_t dbc:8,
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dummy:8,
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len:8,
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src:8;
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u_int32_t cyc:16,
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:16;
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#endif
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};
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struct dvdbc{
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#if BYTE_ORDER == BIG_ENDIAN
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u_int32_t :8,
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dbn:8,
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rsv0:3,
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z:1,
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dseq:4,
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seq:4,
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rsv1:1,
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sct:3;
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#else
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u_int32_t seq:4,
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:1,
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sct:3,
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:3,
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z:1,
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dseq:4,
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dbn:8,
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:8;
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#endif
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u_int32_t ld[19];
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};
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