7c12b677f5
These are older MIPS4kc parts from Atheros. They typically ran at sub-200MHz and have 11bg, 11a, or 11abg wifi MAC/PHYs integrated. This port is the initial non-wifi pieces required to bring up the chip. I'll commit the redboot and other pieces later, and then hopefully(!) wifi support will follow. Submitted by: Mori Hiroki <yamori813@yahoo.co.jp> Differential Revision: https://reviews.freebsd.org/D7237
535 lines
13 KiB
C
535 lines
13 KiB
C
/*-
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* Copyright (c) 2016, Hiroki Mori
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* Copyright (c) 2009, Luiz Otavio O Souza.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* GPIO driver for AR5315
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <mips/atheros/ar531x/ar5315reg.h>
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#include <mips/atheros/ar531x/ar5315_cpudef.h>
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#include <mips/atheros/ar531x/ar5315_gpiovar.h>
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#include <dev/gpio/gpiobusvar.h>
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#include "gpio_if.h"
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#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
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/*
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* Helpers
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*/
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static void ar5315_gpio_function_enable(struct ar5315_gpio_softc *sc,
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uint32_t mask);
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static void ar5315_gpio_function_disable(struct ar5315_gpio_softc *sc,
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uint32_t mask);
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static void ar5315_gpio_pin_configure(struct ar5315_gpio_softc *sc,
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struct gpio_pin *pin, uint32_t flags);
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/*
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* Driver stuff
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*/
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static int ar5315_gpio_probe(device_t dev);
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static int ar5315_gpio_attach(device_t dev);
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static int ar5315_gpio_detach(device_t dev);
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static int ar5315_gpio_filter(void *arg);
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static void ar5315_gpio_intr(void *arg);
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/*
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* GPIO interface
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*/
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static device_t ar5315_gpio_get_bus(device_t);
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static int ar5315_gpio_pin_max(device_t dev, int *maxpin);
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static int ar5315_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
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static int ar5315_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
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*flags);
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static int ar5315_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
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static int ar5315_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
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static int ar5315_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
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static int ar5315_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
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static int ar5315_gpio_pin_toggle(device_t dev, uint32_t pin);
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/*
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* Enable/disable the GPIO function control space.
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*
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* This is primarily for the AR5315, which has SPI CS1/CS2, UART, SLIC, I2S
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* as GPIO pin options.
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*/
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static void
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ar5315_gpio_function_enable(struct ar5315_gpio_softc *sc, uint32_t mask)
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{
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// GPIO_SET_BITS(sc, AR5315_GPIO_FUNCTION, mask);
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}
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static void
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ar5315_gpio_function_disable(struct ar5315_gpio_softc *sc, uint32_t mask)
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{
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// GPIO_CLEAR_BITS(sc, AR5315_GPIO_FUNCTION, mask);
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}
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static void
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ar5315_gpio_pin_configure(struct ar5315_gpio_softc *sc, struct gpio_pin *pin,
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unsigned int flags)
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{
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uint32_t mask;
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mask = 1 << pin->gp_pin;
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/*
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* Manage input/output
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*/
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if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
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pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
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if (flags & GPIO_PIN_OUTPUT) {
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pin->gp_flags |= GPIO_PIN_OUTPUT;
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GPIO_SET_BITS(sc, ar531x_gpio_cr(), mask);
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}
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else {
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pin->gp_flags |= GPIO_PIN_INPUT;
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GPIO_CLEAR_BITS(sc, ar531x_gpio_cr(), mask);
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}
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}
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}
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static device_t
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ar5315_gpio_get_bus(device_t dev)
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{
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struct ar5315_gpio_softc *sc;
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sc = device_get_softc(dev);
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return (sc->busdev);
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}
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static int
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ar5315_gpio_pin_max(device_t dev, int *maxpin)
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{
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*maxpin = ar531x_gpio_pins() - 1;
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return (0);
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}
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static int
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ar5315_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct ar5315_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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*caps = sc->gpio_pins[i].gp_caps;
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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ar5315_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct ar5315_gpio_softc *sc = device_get_softc(dev);
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int i;
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int dir;
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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dir = GPIO_READ(sc, ar531x_gpio_cr()) & (1 << pin);
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*flags = dir ? GPIO_PIN_OUTPUT : GPIO_PIN_INPUT;
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/*
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GPIO_LOCK(sc);
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*flags = sc->gpio_pins[i].gp_flags;
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GPIO_UNLOCK(sc);
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*/
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return (0);
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}
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static int
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ar5315_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct ar5315_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
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GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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ar5315_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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int i;
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struct ar5315_gpio_softc *sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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ar5315_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
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return (0);
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}
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static int
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ar5315_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct ar5315_gpio_softc *sc = device_get_softc(dev);
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uint32_t state;
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state = GPIO_READ(sc, ar531x_gpio_do());
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if(value == 1) {
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state |= (1 << pin);
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} else {
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state &= ~(1 << pin);
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}
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GPIO_WRITE(sc, ar531x_gpio_do(), state);
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return (0);
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}
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static int
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ar5315_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
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{
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struct ar5315_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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*val = (GPIO_READ(sc, ar531x_gpio_di()) & (1 << pin)) ? 1 : 0;
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return (0);
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}
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static int
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ar5315_gpio_pin_toggle(device_t dev, uint32_t pin)
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{
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int res, i;
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struct ar5315_gpio_softc *sc = device_get_softc(dev);
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for (i = 0; i < sc->gpio_npins; i++) {
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if (sc->gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->gpio_npins)
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return (EINVAL);
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res = (GPIO_READ(sc, ar531x_gpio_do()) & (1 << pin)) ? 1 : 0;
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if (res)
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GPIO_CLEAR_BITS(sc, ar531x_gpio_do(), pin);
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else
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GPIO_SET_BITS(sc, ar531x_gpio_do(), pin);
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return (0);
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}
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static int
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ar5315_gpio_filter(void *arg)
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{
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/* TODO: something useful */
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return (FILTER_STRAY);
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}
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static void
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ar5315_gpio_intr(void *arg)
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{
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struct ar5315_gpio_softc *sc = arg;
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GPIO_LOCK(sc);
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/* TODO: something useful */
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GPIO_UNLOCK(sc);
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}
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static int
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ar5315_gpio_probe(device_t dev)
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{
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device_set_desc(dev, "Atheros AR531x GPIO driver");
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return (0);
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}
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static int
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ar5315_gpio_attach(device_t dev)
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{
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struct ar5315_gpio_softc *sc = device_get_softc(dev);
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int i, j, maxpin;
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int mask, pinon;
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uint32_t oe;
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KASSERT((device_get_unit(dev) == 0),
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("ar5315_gpio: Only one gpio module supported"));
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mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
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/* Map control/status registers. */
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sc->gpio_mem_rid = 0;
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sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->gpio_mem_rid, RF_ACTIVE);
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if (sc->gpio_mem_res == NULL) {
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device_printf(dev, "couldn't map memory\n");
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ar5315_gpio_detach(dev);
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return (ENXIO);
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}
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if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
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device_printf(dev, "unable to allocate IRQ resource\n");
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ar5315_gpio_detach(dev);
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return (ENXIO);
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}
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if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC,
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ar5315_gpio_filter, ar5315_gpio_intr, sc, &sc->gpio_ih))) {
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device_printf(dev,
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"WARNING: unable to register interrupt handler\n");
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ar5315_gpio_detach(dev);
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return (ENXIO);
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}
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sc->dev = dev;
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/* Enable function bits that are required */
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"function_set", &mask) == 0) {
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device_printf(dev, "function_set: 0x%x\n", mask);
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ar5315_gpio_function_enable(sc, mask);
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}
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/* Disable function bits that are required */
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"function_clear", &mask) == 0) {
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device_printf(dev, "function_clear: 0x%x\n", mask);
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ar5315_gpio_function_disable(sc, mask);
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}
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/* Initialise all pins specified in the mask, up to the pin count */
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(void) ar5315_gpio_pin_max(dev, &maxpin);
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"pinmask", &mask) != 0)
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mask = 0;
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"pinon", &pinon) != 0)
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pinon = 0;
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device_printf(dev, "gpio pinmask=0x%x\n", mask);
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for (j = 0; j <= maxpin; j++) {
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if ((mask & (1 << j)) == 0)
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continue;
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sc->gpio_npins++;
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}
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/* Iniatilize the GPIO pins, keep the loader settings. */
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oe = GPIO_READ(sc, ar531x_gpio_cr());
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sc->gpio_pins = malloc(sizeof(struct gpio_pin) * sc->gpio_npins,
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M_DEVBUF, M_WAITOK | M_ZERO);
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for (i = 0, j = 0; j <= maxpin; j++) {
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if ((mask & (1 << j)) == 0)
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continue;
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snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME,
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"pin %d", j);
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sc->gpio_pins[i].gp_pin = j;
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sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
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if (oe & (1 << j))
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sc->gpio_pins[i].gp_flags = GPIO_PIN_OUTPUT;
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else
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sc->gpio_pins[i].gp_flags = GPIO_PIN_INPUT;
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i++;
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}
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#if 0
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/* Turn on the hinted pins. */
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for (i = 0; i < sc->gpio_npins; i++) {
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j = sc->gpio_pins[i].gp_pin;
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if ((pinon & (1 << j)) != 0) {
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ar5315_gpio_pin_setflags(dev, j, GPIO_PIN_OUTPUT);
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ar5315_gpio_pin_set(dev, j, 1);
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}
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}
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/*
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* Search through the function hints, in case there's some
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* overrides such as LNA control.
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*
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* hint.gpio.X.func.<pin>.gpiofunc=<func value>
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* hint.gpio.X.func.<pin>.gpiomode=1 (for output, default low)
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*/
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for (i = 0; i <= maxpin; i++) {
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char buf[32];
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int gpiofunc, gpiomode;
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snprintf(buf, 32, "func.%d.gpiofunc", i);
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if (resource_int_value(device_get_name(dev),
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device_get_unit(dev),
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buf,
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&gpiofunc) != 0)
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continue;
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/* Get the mode too */
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snprintf(buf, 32, "func.%d.gpiomode", i);
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if (resource_int_value(device_get_name(dev),
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device_get_unit(dev),
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buf,
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&gpiomode) != 0)
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continue;
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/* We only handle mode=1 for now */
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if (gpiomode != 1)
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continue;
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device_printf(dev, "%s: GPIO %d: func=%d, mode=%d\n",
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__func__,
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i,
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gpiofunc,
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gpiomode);
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/* Set output (bit == 0) */
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oe = GPIO_READ(sc, ar531x_gpio_cr());
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oe &= ~ (1 << i);
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GPIO_WRITE(sc, ar531x_gpio_cr(), oe);
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/* Set pin value = 0, so it stays low by default */
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oe = GPIO_READ(sc, ar531x_gpio_do());
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oe &= ~ (1 << i);
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GPIO_WRITE(sc, ar531x_gpio_do(), oe);
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/* Finally: Set the output config */
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// ar5315_gpio_ouput_configure(i, gpiofunc);
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}
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#endif
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sc->busdev = gpiobus_attach_bus(dev);
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if (sc->busdev == NULL) {
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ar5315_gpio_detach(dev);
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return (ENXIO);
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}
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return (0);
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}
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static int
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ar5315_gpio_detach(device_t dev)
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{
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struct ar5315_gpio_softc *sc = device_get_softc(dev);
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KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
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gpiobus_detach_bus(dev);
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if (sc->gpio_ih)
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bus_teardown_intr(dev, sc->gpio_irq_res, sc->gpio_ih);
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if (sc->gpio_irq_res)
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bus_release_resource(dev, SYS_RES_IRQ, sc->gpio_irq_rid,
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sc->gpio_irq_res);
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if (sc->gpio_mem_res)
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|
bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
|
|
sc->gpio_mem_res);
|
|
if (sc->gpio_pins)
|
|
free(sc->gpio_pins, M_DEVBUF);
|
|
mtx_destroy(&sc->gpio_mtx);
|
|
|
|
return(0);
|
|
}
|
|
|
|
static device_method_t ar5315_gpio_methods[] = {
|
|
DEVMETHOD(device_probe, ar5315_gpio_probe),
|
|
DEVMETHOD(device_attach, ar5315_gpio_attach),
|
|
DEVMETHOD(device_detach, ar5315_gpio_detach),
|
|
|
|
/* GPIO protocol */
|
|
DEVMETHOD(gpio_get_bus, ar5315_gpio_get_bus),
|
|
DEVMETHOD(gpio_pin_max, ar5315_gpio_pin_max),
|
|
DEVMETHOD(gpio_pin_getname, ar5315_gpio_pin_getname),
|
|
DEVMETHOD(gpio_pin_getflags, ar5315_gpio_pin_getflags),
|
|
DEVMETHOD(gpio_pin_getcaps, ar5315_gpio_pin_getcaps),
|
|
DEVMETHOD(gpio_pin_setflags, ar5315_gpio_pin_setflags),
|
|
DEVMETHOD(gpio_pin_get, ar5315_gpio_pin_get),
|
|
DEVMETHOD(gpio_pin_set, ar5315_gpio_pin_set),
|
|
DEVMETHOD(gpio_pin_toggle, ar5315_gpio_pin_toggle),
|
|
{0, 0},
|
|
};
|
|
|
|
static driver_t ar5315_gpio_driver = {
|
|
"gpio",
|
|
ar5315_gpio_methods,
|
|
sizeof(struct ar5315_gpio_softc),
|
|
};
|
|
static devclass_t ar5315_gpio_devclass;
|
|
|
|
DRIVER_MODULE(ar5315_gpio, apb, ar5315_gpio_driver, ar5315_gpio_devclass, 0, 0);
|