7104aeef01
We now also read configuration information for the SCSI cards- this allows us to try and say what the speed settings now are. Start, but not yet complete, the process of reorgs && #defines so that we can backport to RELENG_4 pretty soon.
347 lines
10 KiB
C
347 lines
10 KiB
C
/* $FreeBSD$ */
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/*
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* LSI MPT Host Adapter FreeBSD Wrapper Definitions (CAM version)
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*
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* Copyright (c) 2000, 2001 by Greg Ansley, Adam Prewett
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*
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* Partially derived from Matty Jacobs ISP driver.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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*/
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/*
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* Additional Copyright (c) 2002 by Matthew Jacob under same license.
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*/
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#ifndef _MPT_FREEBSD_H_
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#define _MPT_FREEBSD_H_
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/* #define RELENG_4 1 */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/endian.h>
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#include <sys/kernel.h>
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#include <sys/queue.h>
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#ifdef RELENG_4
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#include <sys/malloc.h>
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#else
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/condvar.h>
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#endif
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#include <sys/proc.h>
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#include <sys/bus.h>
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#include <machine/bus_memio.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <cam/cam.h>
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#include <cam/cam_debug.h>
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#include <cam/cam_ccb.h>
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#include <cam/cam_sim.h>
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#include <cam/cam_xpt.h>
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#include <cam/cam_xpt_sim.h>
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#include <cam/cam_debug.h>
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#include <cam/scsi/scsi_all.h>
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#include <cam/scsi/scsi_message.h>
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#include "opt_ddb.h"
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#include "dev/mpt/mpilib/mpi_type.h"
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#include "dev/mpt/mpilib/mpi.h"
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#include "dev/mpt/mpilib/mpi_cnfg.h"
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#include "dev/mpt/mpilib/mpi_fc.h"
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#include "dev/mpt/mpilib/mpi_init.h"
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#include "dev/mpt/mpilib/mpi_ioc.h"
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#include "dev/mpt/mpilib/mpi_lan.h"
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#include "dev/mpt/mpilib/mpi_targ.h"
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#define INLINE __inline
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#ifdef RELENG_4
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#define MPT_IFLAGS INTR_TYPE_CAM
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#define MPT_LOCK(mpt) mpt_lockspl(mpt)
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#define MPT_UNLOCK(mpt) mpt_unlockspl(mpt)
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#define MPTLOCK_2_CAMLOCK MPT_UNLOCK
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#define CAMLOCK_2_MPTLOCK(mpt) MPT_LOCK
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#define MPT_LOCK_SETUP(mpt)
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#define MPT_LOCK_DESTROY(mpt)
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#else
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#define MPT_IFLAGS INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE
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#define MPT_LOCK_SETUP(mpt) \
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mtx_init(&mpt->mpt_lock, "mpt", NULL, MTX_DEF); \
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mpt->mpt_locksetup = 1
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#define MPT_LOCK_DESTROY(mpt) \
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if (mpt->mpt_locksetup) { \
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mtx_destroy(&mpt->mpt_lock); \
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mpt->mpt_locksetup = 0; \
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}
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#define MPT_LOCK(mpt) mtx_lock(&(mpt)->mpt_lock)
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#define MPT_UNLOCK(mpt) mtx_unlock(&(mpt)->mpt_lock)
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#define MPTLOCK_2_CAMLOCK(mpt) \
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mtx_unlock(&(mpt)->mpt_lock); mtx_lock(&Giant)
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#define CAMLOCK_2_MPTLOCK(mpt) \
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mtx_unlock(&Giant); mtx_lock(&(mpt)->mpt_lock)
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#endif
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/* Max MPT Reply we are willing to accept (must be power of 2) */
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#define MPT_REPLY_SIZE 128
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#define MPT_MAX_REQUESTS 256 /* XXX: should be derived from GlobalCredits */
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#define MPT_REQUEST_AREA 512
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#define MPT_SENSE_SIZE 32 /* included in MPT_REQUEST_SIZE */
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#define MPT_REQ_MEM_SIZE (MPT_MAX_REQUESTS * MPT_REQUEST_AREA)
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/*
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* We cannot tell prior to getting IOC facts how big the IOC's request
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* area is. Because of this we cannot tell at compile time how many
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* simple SG elements we can fit within an IOC request prior to having
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* to put in a chain element.
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*
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* Experimentally we know that the Ultra4 parts have a 96 byte request
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* element size and the Fibre Channel units have a 144 byte request
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* element size. Therefore, if we have 512-32 (== 480) bytes of request
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* area to play with, we have room for between 3 and 5 request sized
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* regions- the first of which is the command plus a simple SG list,
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* the rest of which are chained continuation SG lists. Given that the
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* normal request we use is 48 bytes w/o the first SG element, we can
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* assume we have 480-48 == 432 bytes to have simple SG elements and/or
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* chain elements. If we assume 32 bit addressing, this works out to
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* 54 SG or chain elements. If we assume 5 chain elements, then we have
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* a maximum of 49 seperate actual SG segments.
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*/
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#define MPT_SGL_MAX 49
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#define MPT_RQSL(mpt) (mpt->request_frame_size << 2)
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#define MPT_NSGL(mpt) (MPT_RQSL(mpt) / sizeof (SGE_SIMPLE32))
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#define MPT_NSGL_FIRST(mpt) \
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(((mpt->request_frame_size << 2) - \
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sizeof (MSG_SCSI_IO_REQUEST) - \
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sizeof (SGE_IO_UNION)) / sizeof (SGE_SIMPLE32))
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/*
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* Convert a physical address returned from IOC to kvm address
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* needed to access the data.
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*/
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#define MPT_REPLY_PTOV(m, x) \
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((void *)(m->reply + ((x << 1) - (u_int32_t)(m->reply_phys))))
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#define ccb_mpt_ptr sim_priv.entries[0].ptr
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#define ccb_req_ptr sim_priv.entries[1].ptr
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enum mpt_req_state {
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REQ_FREE, REQ_IN_PROGRESS, REQ_TIMEOUT, REQ_ON_CHIP, REQ_DONE
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};
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typedef struct req_entry {
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u_int16_t index; /* Index of this entry */
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union ccb *ccb; /* CAM request */
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void *req_vbuf; /* Virtual Address of Entry */
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void *sense_vbuf; /* Virtual Address of sense data */
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u_int32_t req_pbuf; /* Physical Address of Entry */
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u_int32_t sense_pbuf; /* Physical Address of sense data */
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bus_dmamap_t dmap; /* DMA map for data buffer */
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SLIST_ENTRY(req_entry) link; /* Pointer to next in list */
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enum mpt_req_state debug; /* Debugging */
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u_int32_t sequence; /* Sequence Number */
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} request_t;
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/* Structure for saving proper values for modifyable PCI configuration registers */
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struct mpt_pci_cfg {
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u_int16_t Command;
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u_int16_t LatencyTimer_LineSize;
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u_int32_t IO_BAR;
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u_int32_t Mem0_BAR[2];
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u_int32_t Mem1_BAR[2];
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u_int32_t ROM_BAR;
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u_int8_t IntLine;
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u_int32_t PMCSR;
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};
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typedef struct mpt_softc {
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device_t dev;
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#ifdef RELENG_4
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int mpt_splsaved;
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u_int32_t mpt_islocked;
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#else
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struct mtx mpt_lock;
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#endif
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u_int32_t : 16,
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unit : 8,
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verbose : 3,
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: 1,
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mpt_locksetup : 1,
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disabled : 1,
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is_fc : 1,
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bus : 1; /* FC929/1030 have two busses */
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/*
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* IOC Facts
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*/
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u_int16_t mpt_global_credits;
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u_int16_t request_frame_size;
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u_int8_t mpt_max_devices;
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u_int8_t mpt_max_buses;
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/*
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* Port Facts
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*/
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u_int16_t mpt_ini_id;
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/*
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* Device Configuration Information
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*/
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union {
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struct mpt_spi_cfg {
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fCONFIG_PAGE_SCSI_PORT_0 _port_page0;
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fCONFIG_PAGE_SCSI_PORT_1 _port_page1;
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fCONFIG_PAGE_SCSI_PORT_2 _port_page2;
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fCONFIG_PAGE_SCSI_DEVICE_0 _dev_page0[16];
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fCONFIG_PAGE_SCSI_DEVICE_1 _dev_page1[16];
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uint16_t _tagmask;
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uint16_t _update_params0;
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uint16_t _update_params1;
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} spi;
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#define mpt_port_page0 cfg.spi._port_page0
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#define mpt_port_page1 cfg.spi._port_page1
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#define mpt_port_page2 cfg.spi._port_page2
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#define mpt_dev_page0 cfg.spi._dev_page0
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#define mpt_dev_page1 cfg.spi._dev_page1
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#define mpt_tagmask cfg.spi._tagmask
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#define mpt_update_params0 cfg.spi._update_params0
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#define mpt_update_params1 cfg.spi._update_params1
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struct mpi_fc_cfg {
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u_int8_t nada;
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} fc;
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} cfg;
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/*
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* PCI Hardware info
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*/
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struct resource * pci_irq; /* Interrupt map for chip */
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void * ih; /* Interupt handle */
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struct mpt_pci_cfg pci_cfg; /* saved PCI conf registers */
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/*
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* DMA Mapping Stuff
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*/
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struct resource * pci_reg; /* Register map for chip */
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int pci_reg_id; /* Resource ID */
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bus_space_tag_t pci_st; /* Bus tag for registers */
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bus_space_handle_t pci_sh; /* Bus handle for registers */
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vm_offset_t pci_pa; /* Physical Address */
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bus_dma_tag_t parent_dmat; /* DMA tag for parent PCI bus */
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bus_dma_tag_t reply_dmat; /* DMA tag for reply memory */
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bus_dmamap_t reply_dmap; /* DMA map for reply memory */
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char * reply; /* KVA of reply memory */
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u_int32_t reply_phys; /* BusAddr of reply memory (XXX Wrong) */
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bus_dma_tag_t buffer_dmat; /* DMA tag for buffers */
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bus_dma_tag_t request_dmat; /* DMA tag for request memroy */
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bus_dmamap_t request_dmap; /* DMA map for request memroy */
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char * request; /* KVA of Request memory */
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u_int32_t request_phys; /* BusADdr of request memory (XXX WRONG) */
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/*
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* CAM && Software Management
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*/
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request_t requests[MPT_MAX_REQUESTS];
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SLIST_HEAD(req_queue, req_entry) request_free_list;
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struct cam_sim * sim;
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struct cam_path * path;
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u_int32_t sequence; /* Sequence Number */
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u_int32_t timeouts; /* timeout count */
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u_int32_t success; /* successes afer timeout */
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/* Opposing port in a 929 or 1030, or NULL */
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struct mpt_softc * mpt2;
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} mpt_softc_t;
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#include <dev/mpt/mpt.h>
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static INLINE void mpt_write(mpt_softc_t *, size_t, u_int32_t);
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static INLINE u_int32_t mpt_read(mpt_softc_t *, int);
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static INLINE void
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mpt_write(mpt_softc_t *mpt, size_t offset, u_int32_t val)
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{
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bus_space_write_4(mpt->pci_st, mpt->pci_sh, offset, val);
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}
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static INLINE u_int32_t
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mpt_read(mpt_softc_t *mpt, int offset)
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{
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return (bus_space_read_4(mpt->pci_st, mpt->pci_sh, offset));
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}
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void mpt_cam_attach(mpt_softc_t *);
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void mpt_cam_detach(mpt_softc_t *);
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void mpt_done(mpt_softc_t *, u_int32_t);
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void mpt_notify(mpt_softc_t *, void *, u_int32_t);
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void mpt_set_config_regs(mpt_softc_t *);
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#ifdef RELENG_4
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static INLINE void mpt_lockspl(mpt_softc_t *);
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static INLINE void mpt_unlockspl(mpt_softc_t *);
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static INLINE void
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mpt_lockspl(mpt_softc_t *mpt)
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{
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int s = splcam();
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if (mpt->mpt_islocked++ == 0) {
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mpt->mpt_splsaved = s;
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} else {
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splx(s);
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}
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}
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static INLINE void
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mpt_unlockspl(mpt_softc_t *mpt)
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{
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if (mpt->mpt_islocked) {
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if (--mpt->mpt_islocked == 0) {
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splx(mpt->mpt_splsaved);
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}
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}
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}
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#endif
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#endif /* _MPT_FREEBSD_H */
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