2c1c8bb345
places. Provide n32/n64 register name defintions. This should have no effect for the O32 builds that everybody else uses, but should help make N64 builds possible (lots of other changes are needed for that). Obtained from: NetBSD (for the regdef.h changes)
87 lines
2.0 KiB
C
87 lines
2.0 KiB
C
/*-
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* Copyright (c) 2001, Juniper Networks, Inc.
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* All rights reserved.
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* Truman Joe, February 2001.
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*
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* regdef.h -- MIPS register definitions.
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*
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* JNPR: regdef.h,v 1.3 2006/08/07 05:38:57 katta
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* $FreeBSD$
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*/
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#ifndef _MACHINE_REGDEF_H_
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#define _MACHINE_REGDEF_H_
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#include <machine/cdefs.h> /* For API selection */
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#if defined(__ASSEMBLER__)
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/* General purpose CPU register names */
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#define zero $0 /* wired zero */
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#define AT $at /* assembler temp */
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#define v0 $2 /* return value */
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#define v1 $3
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#define a0 $4 /* argument registers */
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#define a1 $5
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#define a2 $6
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#define a3 $7
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#if defined(__mips_n32) || defined(__mips_n64)
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#define a4 $8
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#define a5 $9
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#define a6 $10
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#define a7 $11
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#define t0 $12 /* Temp regs, not saved accross subroutine calls */
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#define t1 $13
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#define t2 $14
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#define t3 $15
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#else
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#define t0 $8 /* caller saved */
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#define t1 $9
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#define t2 $10
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#define t3 $11
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#define t4 $12 /* caller saved - 32 bit env arg reg 64 bit */
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#define t5 $13
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#define t6 $14
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#define t7 $15
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#endif
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#define s0 $16 /* callee saved */
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#define s1 $17
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#define s2 $18
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#define s3 $19
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#define s4 $20
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#define s5 $21
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#define s6 $22
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#define s7 $23
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#define t8 $24 /* code generator */
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#define t9 $25
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#define k0 $26 /* kernel temporary */
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#define k1 $27
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#define gp $28 /* global pointer */
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#define sp $29 /* stack pointer */
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#define fp $30 /* frame pointer */
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#define s8 $30 /* callee saved */
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#define ra $31 /* return address */
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/*
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* These are temp registers whose names can be used in either the old
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* or new ABI, although they map to different physical registers. In
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* the old ABI, they map to t4-t7, and in the new ABI, they map to a4-a7.
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*
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* Because they overlap with the last 4 arg regs in the new ABI, ta0-ta3
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* should be used only when we need more than t0-t3.
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*/
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#if defined(__mips_n32) || defined(__mips_n64)
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#define ta0 $8
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#define ta1 $9
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#define ta2 $10
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#define ta3 $11
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#else
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#define ta0 $12
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#define ta1 $13
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#define ta2 $14
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#define ta3 $15
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#endif /* __mips_n32 || __mips_n64 */
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#endif /* __ASSEMBLER__ */
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#endif /* !_MACHINE_REGDEF_H_ */
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