528 lines
12 KiB
ArmAsm
528 lines
12 KiB
ArmAsm
/*
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* CDDL HEADER START
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*
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* The contents of this file are subject to the terms of the
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* Common Development and Distribution License, Version 1.0 only
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* (the "License"). You may not use this file except in compliance
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* with the License.
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*
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* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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* or http://www.opensolaris.org/os/licensing.
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* See the License for the specific language governing permissions
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* and limitations under the License.
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*
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* When distributing Covered Code, include this CDDL HEADER in each
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* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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* If applicable, add the following below this CDDL HEADER, with the
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* fields enclosed by brackets "[]" replaced with your own identifying
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* information: Portions Copyright [yyyy] [name of copyright owner]
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*
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* CDDL HEADER END
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*
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* $FreeBSD$
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*/
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/*
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* Copyright 2004 Sun Microsystems, Inc. All rights reserved.
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* Use is subject to license terms.
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*/
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#define _ASM
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#include <machine/asmacros.h>
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#include <sys/cpuvar_defs.h>
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#include <sys/dtrace.h>
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#include "assym.s"
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.globl calltrap
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.type calltrap,@function
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ENTRY(dtrace_invop_start)
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pushl %eax /* push %eax -- may be return value */
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pushl %esp /* push stack pointer */
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addl $48, (%esp) /* adjust to incoming args */
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pushl 40(%esp) /* push calling EIP */
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/*
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* Call dtrace_invop to let it check if the exception was
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* a fbt one. The return value in %eax will tell us what
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* dtrace_invop wants us to do.
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*/
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call dtrace_invop
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/*
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* We pushed 3 times for the arguments to dtrace_invop,
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* so we need to increment the stack pointer to get rid of
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* those values.
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*/
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addl $12, %esp
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ALTENTRY(dtrace_invop_callsite)
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cmpl $DTRACE_INVOP_PUSHL_EBP, %eax
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je invop_push
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cmpl $DTRACE_INVOP_POPL_EBP, %eax
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je invop_pop
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cmpl $DTRACE_INVOP_LEAVE, %eax
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je invop_leave
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cmpl $DTRACE_INVOP_NOP, %eax
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je invop_nop
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/* When all else fails handle the trap in the usual way. */
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jmpl *dtrace_invop_calltrap_addr
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invop_push:
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/*
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* We must emulate a "pushl %ebp". To do this, we pull the stack
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* down 4 bytes, and then store the base pointer.
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*/
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popal
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subl $4, %esp /* make room for %ebp */
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pushl %eax /* push temp */
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movl 8(%esp), %eax /* load calling EIP */
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incl %eax /* increment over LOCK prefix */
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movl %eax, 4(%esp) /* store calling EIP */
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movl 12(%esp), %eax /* load calling CS */
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movl %eax, 8(%esp) /* store calling CS */
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movl 16(%esp), %eax /* load calling EFLAGS */
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movl %eax, 12(%esp) /* store calling EFLAGS */
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movl %ebp, 16(%esp) /* push %ebp */
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popl %eax /* pop off temp */
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iret /* Return from interrupt. */
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invop_pop:
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/*
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* We must emulate a "popl %ebp". To do this, we do the opposite of
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* the above: we remove the %ebp from the stack, and squeeze up the
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* saved state from the trap.
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*/
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popal
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pushl %eax /* push temp */
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movl 16(%esp), %ebp /* pop %ebp */
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movl 12(%esp), %eax /* load calling EFLAGS */
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movl %eax, 16(%esp) /* store calling EFLAGS */
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movl 8(%esp), %eax /* load calling CS */
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movl %eax, 12(%esp) /* store calling CS */
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movl 4(%esp), %eax /* load calling EIP */
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incl %eax /* increment over LOCK prefix */
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movl %eax, 8(%esp) /* store calling EIP */
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popl %eax /* pop off temp */
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addl $4, %esp /* adjust stack pointer */
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iret /* Return from interrupt. */
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invop_leave:
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/*
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* We must emulate a "leave", which is the same as a "movl %ebp, %esp"
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* followed by a "popl %ebp". This looks similar to the above, but
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* requires two temporaries: one for the new base pointer, and one
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* for the staging register.
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*/
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popa
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pushl %eax /* push temp */
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pushl %ebx /* push temp */
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movl %ebp, %ebx /* set temp to old %ebp */
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movl (%ebx), %ebp /* pop %ebp */
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movl 16(%esp), %eax /* load calling EFLAGS */
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movl %eax, (%ebx) /* store calling EFLAGS */
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movl 12(%esp), %eax /* load calling CS */
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movl %eax, -4(%ebx) /* store calling CS */
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movl 8(%esp), %eax /* load calling EIP */
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incl %eax /* increment over LOCK prefix */
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movl %eax, -8(%ebx) /* store calling EIP */
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movl %ebx, -4(%esp) /* temporarily store new %esp */
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popl %ebx /* pop off temp */
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popl %eax /* pop off temp */
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movl -12(%esp), %esp /* set stack pointer */
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subl $8, %esp /* adjust for three pushes, one pop */
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iret /* return from interrupt */
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invop_nop:
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/*
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* We must emulate a "nop". This is obviously not hard: we need only
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* advance the %eip by one.
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*/
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popa
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incl (%esp)
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iret /* return from interrupt */
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END(dtrace_invop_start)
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/*
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void dtrace_invop_init(void)
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*/
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ENTRY(dtrace_invop_init)
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movl $dtrace_invop_start, dtrace_invop_jump_addr
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ret
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END(dtrace_invop_init)
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/*
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void dtrace_invop_uninit(void)
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*/
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ENTRY(dtrace_invop_uninit)
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movl $0, dtrace_invop_jump_addr
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ret
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END(dtrace_invop_uninit)
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/*
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greg_t dtrace_getfp(void)
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*/
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ENTRY(dtrace_getfp)
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movl %ebp, %eax
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ret
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END(dtrace_getfp)
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/*
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uint32_t dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new)
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*/
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ENTRY(dtrace_cas32)
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ALTENTRY(dtrace_casptr)
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movl 4(%esp), %edx
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movl 8(%esp), %eax
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movl 12(%esp), %ecx
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lock
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cmpxchgl %ecx, (%edx)
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ret
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END(dtrace_casptr)
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END(dtrace_cas32)
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/*
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uintptr_t dtrace_caller(int aframes)
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*/
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ENTRY(dtrace_caller)
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movl $-1, %eax
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ret
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END(dtrace_caller)
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/*
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void dtrace_copy(uintptr_t src, uintptr_t dest, size_t size)
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*/
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ENTRY(dtrace_copy)
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pushl %ebp
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movl %esp, %ebp
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pushl %esi
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pushl %edi
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movl 8(%ebp), %esi /* Load source address */
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movl 12(%ebp), %edi /* Load destination address */
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movl 16(%ebp), %ecx /* Load count */
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repz /* Repeat for count... */
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smovb /* move from %ds:si to %es:di */
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popl %edi
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popl %esi
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movl %ebp, %esp
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popl %ebp
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ret
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END(dtrace_copy)
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/*
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void dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size)
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*/
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ENTRY(dtrace_copystr)
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pushl %ebp /* Setup stack frame */
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movl %esp, %ebp
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pushl %ebx /* Save registers */
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movl 8(%ebp), %ebx /* Load source address */
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movl 12(%ebp), %edx /* Load destination address */
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movl 16(%ebp), %ecx /* Load count */
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0:
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movb (%ebx), %al /* Load from source */
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movb %al, (%edx) /* Store to destination */
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incl %ebx /* Increment source pointer */
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incl %edx /* Increment destination pointer */
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decl %ecx /* Decrement remaining count */
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cmpb $0, %al
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je 1f
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cmpl $0, %ecx
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jne 0b
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1:
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popl %ebx
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movl %ebp, %esp
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popl %ebp
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ret
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END(dtrace_copystr)
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/*
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uintptr_t dtrace_fulword(void *addr)
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*/
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ENTRY(dtrace_fulword)
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movl 4(%esp), %ecx
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xorl %eax, %eax
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movl (%ecx), %eax
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ret
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END(dtrace_fulword)
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/*
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uint8_t dtrace_fuword8_nocheck(void *addr)
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*/
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ENTRY(dtrace_fuword8_nocheck)
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movl 4(%esp), %ecx
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xorl %eax, %eax
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movzbl (%ecx), %eax
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ret
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END(dtrace_fuword8_nocheck)
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/*
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uint16_t dtrace_fuword16_nocheck(void *addr)
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*/
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ENTRY(dtrace_fuword16_nocheck)
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movl 4(%esp), %ecx
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xorl %eax, %eax
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movzwl (%ecx), %eax
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ret
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END(dtrace_fuword16_nocheck)
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/*
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uint32_t dtrace_fuword32_nocheck(void *addr)
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*/
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ENTRY(dtrace_fuword32_nocheck)
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movl 4(%esp), %ecx
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xorl %eax, %eax
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movl (%ecx), %eax
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ret
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END(dtrace_fuword32_nocheck)
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/*
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uint64_t dtrace_fuword64_nocheck(void *addr)
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*/
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ENTRY(dtrace_fuword64_nocheck)
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movl 4(%esp), %ecx
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xorl %eax, %eax
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xorl %edx, %edx
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movl (%ecx), %eax
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movl 4(%ecx), %edx
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ret
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END(dtrace_fuword64_nocheck)
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/*
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void dtrace_probe_error(dtrace_state_t *state, dtrace_epid_t epid, int which, int fault, int fltoffs, uintptr_t illval)
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*/
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ENTRY(dtrace_probe_error)
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pushl %ebp
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movl %esp, %ebp
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pushl 0x1c(%ebp)
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pushl 0x18(%ebp)
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pushl 0x14(%ebp)
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pushl 0x10(%ebp)
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pushl 0xc(%ebp)
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pushl 0x8(%ebp)
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pushl dtrace_probeid_error
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call dtrace_probe
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movl %ebp, %esp
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popl %ebp
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ret
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END(dtrace_probe_error)
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/*
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void dtrace_membar_producer(void)
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*/
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ENTRY(dtrace_membar_producer)
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rep; ret /* use 2 byte return instruction when branch target */
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/* AMD Software Optimization Guide - Section 6.2 */
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END(dtrace_membar_producer)
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/*
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void dtrace_membar_consumer(void)
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*/
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ENTRY(dtrace_membar_consumer)
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rep; ret /* use 2 byte return instruction when branch target */
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/* AMD Software Optimization Guide - Section 6.2 */
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END(dtrace_membar_consumer)
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/*
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dtrace_icookie_t dtrace_interrupt_disable(void)
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*/
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ENTRY(dtrace_interrupt_disable)
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pushfl
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popl %eax
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cli
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ret
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END(dtrace_interrupt_disable)
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/*
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void dtrace_interrupt_enable(dtrace_icookie_t cookie)
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*/
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ENTRY(dtrace_interrupt_enable)
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movl 4(%esp), %eax
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pushl %eax
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popfl
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ret
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END(dtrace_interrupt_enable)
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/*
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* The panic() and cmn_err() functions invoke vpanic() as a common entry point
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* into the panic code implemented in panicsys(). vpanic() is responsible
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* for passing through the format string and arguments, and constructing a
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* regs structure on the stack into which it saves the current register
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* values. If we are not dying due to a fatal trap, these registers will
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* then be preserved in panicbuf as the current processor state. Before
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* invoking panicsys(), vpanic() activates the first panic trigger (see
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* common/os/panic.c) and switches to the panic_stack if successful. Note that
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* DTrace takes a slightly different panic path if it must panic from probe
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* context. Instead of calling panic, it calls into dtrace_vpanic(), which
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* sets up the initial stack as vpanic does, calls dtrace_panic_trigger(), and
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* branches back into vpanic().
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*/
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/*
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void vpanic(const char *format, va_list alist)
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*/
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ENTRY(vpanic) /* Initial stack layout: */
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pushl %ebp /* | %eip | 20 */
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movl %esp, %ebp /* | %ebp | 16 */
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pushl %eax /* | %eax | 12 */
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pushl %ebx /* | %ebx | 8 */
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pushl %ecx /* | %ecx | 4 */
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pushl %edx /* | %edx | 0 */
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movl %esp, %ebx /* %ebx = current stack pointer */
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lea panic_quiesce, %eax /* %eax = &panic_quiesce */
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pushl %eax /* push &panic_quiesce */
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call panic_trigger /* %eax = panic_trigger() */
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addl $4, %esp /* reset stack pointer */
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vpanic_common:
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cmpl $0, %eax /* if (%eax == 0) */
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je 0f /* goto 0f; */
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/*
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* If panic_trigger() was successful, we are the first to initiate a
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* panic: we now switch to the reserved panic_stack before continuing.
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*/
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lea panic_stack, %esp /* %esp = panic_stack */
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addl $PANICSTKSIZE, %esp /* %esp += PANICSTKSIZE */
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0: subl $REGSIZE, %esp /* allocate struct regs */
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/*
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* Now that we've got everything set up, store the register values as
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* they were when we entered vpanic() to the designated location in
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* the regs structure we allocated on the stack.
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*/
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#ifdef notyet
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mov %gs, %edx
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mov %edx, REGOFF_GS(%esp)
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mov %fs, %edx
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mov %edx, REGOFF_FS(%esp)
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mov %es, %edx
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mov %edx, REGOFF_ES(%esp)
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mov %ds, %edx
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mov %edx, REGOFF_DS(%esp)
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movl %edi, REGOFF_EDI(%esp)
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movl %esi, REGOFF_ESI(%esp)
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movl 16(%ebx), %ecx
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movl %ecx, REGOFF_EBP(%esp)
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movl %ebx, %ecx
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addl $20, %ecx
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movl %ecx, REGOFF_ESP(%esp)
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movl 8(%ebx), %ecx
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movl %ecx, REGOFF_EBX(%esp)
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movl 0(%ebx), %ecx
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movl %ecx, REGOFF_EDX(%esp)
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movl 4(%ebx), %ecx
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movl %ecx, REGOFF_ECX(%esp)
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movl 12(%ebx), %ecx
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movl %ecx, REGOFF_EAX(%esp)
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movl $0, REGOFF_TRAPNO(%esp)
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movl $0, REGOFF_ERR(%esp)
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lea vpanic, %ecx
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movl %ecx, REGOFF_EIP(%esp)
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mov %cs, %edx
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movl %edx, REGOFF_CS(%esp)
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pushfl
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popl %ecx
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movl %ecx, REGOFF_EFL(%esp)
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movl $0, REGOFF_UESP(%esp)
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mov %ss, %edx
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movl %edx, REGOFF_SS(%esp)
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movl %esp, %ecx /* %ecx = ®s */
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pushl %eax /* push on_panic_stack */
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pushl %ecx /* push ®s */
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movl 12(%ebp), %ecx /* %ecx = alist */
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pushl %ecx /* push alist */
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movl 8(%ebp), %ecx /* %ecx = format */
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pushl %ecx /* push format */
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call panicsys /* panicsys(); */
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addl $16, %esp /* pop arguments */
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addl $REGSIZE, %esp
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#endif
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popl %edx
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popl %ecx
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popl %ebx
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popl %eax
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leave
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ret
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END(vpanic)
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/*
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void dtrace_vpanic(const char *format, va_list alist)
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*/
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ENTRY(dtrace_vpanic) /* Initial stack layout: */
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pushl %ebp /* | %eip | 20 */
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movl %esp, %ebp /* | %ebp | 16 */
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pushl %eax /* | %eax | 12 */
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pushl %ebx /* | %ebx | 8 */
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pushl %ecx /* | %ecx | 4 */
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pushl %edx /* | %edx | 0 */
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movl %esp, %ebx /* %ebx = current stack pointer */
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lea panic_quiesce, %eax /* %eax = &panic_quiesce */
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pushl %eax /* push &panic_quiesce */
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call dtrace_panic_trigger /* %eax = dtrace_panic_trigger() */
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addl $4, %esp /* reset stack pointer */
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jmp vpanic_common /* jump back to common code */
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END(dtrace_vpanic)
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/*
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int
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panic_trigger(int *tp)
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*/
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ENTRY(panic_trigger)
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xorl %eax, %eax
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movl $0xdefacedd, %edx
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lock
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xchgl %edx, (%edi)
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cmpl $0, %edx
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je 0f
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movl $0, %eax
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ret
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0: movl $1, %eax
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ret
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END(panic_trigger)
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/*
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int
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dtrace_panic_trigger(int *tp)
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*/
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ENTRY(dtrace_panic_trigger)
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xorl %eax, %eax
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movl $0xdefacedd, %edx
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lock
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xchgl %edx, (%edi)
|
|
cmpl $0, %edx
|
|
je 0f
|
|
movl $0, %eax
|
|
ret
|
|
0: movl $1, %eax
|
|
ret
|
|
END(dtrace_panic_trigger)
|