308 lines
8.7 KiB
C
308 lines
8.7 KiB
C
/*-
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* Copyright (c) 2001 Tamotsu Hattori.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_cpu.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/conf.h>
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#include <sys/power.h>
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#include <sys/sysctl.h>
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#include <sys/types.h>
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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/*
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* Transmeta Crusoe LongRun Support by Tamotsu Hattori.
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*/
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#define MSR_TMx86_LONGRUN 0x80868010
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#define MSR_TMx86_LONGRUN_FLAGS 0x80868011
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#define LONGRUN_MODE_MASK(x) ((x) & 0x000000007f)
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#define LONGRUN_MODE_RESERVED(x) ((x) & 0xffffff80)
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#define LONGRUN_MODE_WRITE(x, y) (LONGRUN_MODE_RESERVED(x) | LONGRUN_MODE_MASK(y))
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#define LONGRUN_MODE_MINFREQUENCY 0x00
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#define LONGRUN_MODE_ECONOMY 0x01
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#define LONGRUN_MODE_PERFORMANCE 0x02
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#define LONGRUN_MODE_MAXFREQUENCY 0x03
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#define LONGRUN_MODE_UNKNOWN 0x04
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#define LONGRUN_MODE_MAX 0x04
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union msrinfo {
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u_int64_t msr;
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u_int32_t regs[2];
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};
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static u_int32_t longrun_modes[LONGRUN_MODE_MAX][3] = {
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/* MSR low, MSR high, flags bit0 */
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{ 0, 0, 0}, /* LONGRUN_MODE_MINFREQUENCY */
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{ 0, 100, 0}, /* LONGRUN_MODE_ECONOMY */
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{ 0, 100, 1}, /* LONGRUN_MODE_PERFORMANCE */
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{ 100, 100, 1}, /* LONGRUN_MODE_MAXFREQUENCY */
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};
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static u_int
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tmx86_get_longrun_mode(void)
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{
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u_long eflags;
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union msrinfo msrinfo;
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u_int low, high, flags, mode;
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eflags = read_eflags();
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disable_intr();
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msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
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low = LONGRUN_MODE_MASK(msrinfo.regs[0]);
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high = LONGRUN_MODE_MASK(msrinfo.regs[1]);
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flags = rdmsr(MSR_TMx86_LONGRUN_FLAGS) & 0x01;
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for (mode = 0; mode < LONGRUN_MODE_MAX; mode++) {
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if (low == longrun_modes[mode][0] &&
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high == longrun_modes[mode][1] &&
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flags == longrun_modes[mode][2]) {
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goto out;
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}
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}
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mode = LONGRUN_MODE_UNKNOWN;
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out:
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write_eflags(eflags);
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return (mode);
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}
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static u_int
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tmx86_get_longrun_status(u_int * frequency, u_int * voltage, u_int * percentage)
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{
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u_long eflags;
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u_int regs[4];
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eflags = read_eflags();
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disable_intr();
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do_cpuid(0x80860007, regs);
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*frequency = regs[0];
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*voltage = regs[1];
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*percentage = regs[2];
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write_eflags(eflags);
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return (1);
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}
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static u_int
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tmx86_set_longrun_mode(u_int mode)
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{
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u_long eflags;
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union msrinfo msrinfo;
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if (mode >= LONGRUN_MODE_UNKNOWN) {
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return (0);
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}
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eflags = read_eflags();
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disable_intr();
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/* Write LongRun mode values to Model Specific Register. */
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msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN);
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msrinfo.regs[0] = LONGRUN_MODE_WRITE(msrinfo.regs[0],
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longrun_modes[mode][0]);
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msrinfo.regs[1] = LONGRUN_MODE_WRITE(msrinfo.regs[1],
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longrun_modes[mode][1]);
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wrmsr(MSR_TMx86_LONGRUN, msrinfo.msr);
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/* Write LongRun mode flags to Model Specific Register. */
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msrinfo.msr = rdmsr(MSR_TMx86_LONGRUN_FLAGS);
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msrinfo.regs[0] = (msrinfo.regs[0] & ~0x01) | longrun_modes[mode][2];
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wrmsr(MSR_TMx86_LONGRUN_FLAGS, msrinfo.msr);
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write_eflags(eflags);
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return (1);
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}
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static u_int crusoe_longrun;
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static u_int crusoe_frequency;
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static u_int crusoe_voltage;
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static u_int crusoe_percentage;
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static u_int crusoe_performance_longrun = LONGRUN_MODE_PERFORMANCE;
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static u_int crusoe_economy_longrun = LONGRUN_MODE_ECONOMY;
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static struct sysctl_ctx_list crusoe_sysctl_ctx;
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static struct sysctl_oid *crusoe_sysctl_tree;
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static void
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tmx86_longrun_power_profile(void *arg)
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{
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int state;
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u_int new;
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state = power_profile_get_state();
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if (state != POWER_PROFILE_PERFORMANCE &&
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state != POWER_PROFILE_ECONOMY) {
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return;
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}
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switch (state) {
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case POWER_PROFILE_PERFORMANCE:
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new =crusoe_performance_longrun;
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break;
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case POWER_PROFILE_ECONOMY:
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new = crusoe_economy_longrun;
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break;
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default:
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new = tmx86_get_longrun_mode();
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break;
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}
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if (tmx86_get_longrun_mode() != new) {
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tmx86_set_longrun_mode(new);
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}
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}
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static int
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tmx86_longrun_sysctl(SYSCTL_HANDLER_ARGS)
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{
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u_int mode;
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int error;
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crusoe_longrun = tmx86_get_longrun_mode();
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mode = crusoe_longrun;
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error = sysctl_handle_int(oidp, &mode, 0, req);
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if (error || !req->newptr) {
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return (error);
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}
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if (mode >= LONGRUN_MODE_UNKNOWN) {
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error = EINVAL;
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return (error);
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}
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if (crusoe_longrun != mode) {
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crusoe_longrun = mode;
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tmx86_set_longrun_mode(crusoe_longrun);
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}
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return (error);
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}
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static int
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tmx86_status_sysctl(SYSCTL_HANDLER_ARGS)
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{
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u_int val;
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int error;
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tmx86_get_longrun_status(&crusoe_frequency,
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&crusoe_voltage, &crusoe_percentage);
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val = *(u_int *)oidp->oid_arg1;
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error = sysctl_handle_int(oidp, &val, 0, req);
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return (error);
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}
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static int
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tmx86_longrun_profile_sysctl(SYSCTL_HANDLER_ARGS)
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{
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u_int32_t *argp;
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u_int32_t arg;
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int error;
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argp = (u_int32_t *)oidp->oid_arg1;
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arg = *argp;
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error = sysctl_handle_int(oidp, &arg, 0, req);
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/* error or no new value */
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if ((error != 0) || (req->newptr == NULL))
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return (error);
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/* range check */
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if (arg >= LONGRUN_MODE_UNKNOWN)
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return (EINVAL);
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/* set new value and possibly switch */
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*argp = arg;
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tmx86_longrun_power_profile(NULL);
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return (0);
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}
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static void
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setup_tmx86_longrun(void *dummy __unused)
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{
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if (strcmp(cpu_vendor, "GenuineTMx86") != 0 &&
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strcmp(cpu_vendor, "TransmetaCPU") != 0)
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return;
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crusoe_longrun = tmx86_get_longrun_mode();
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tmx86_get_longrun_status(&crusoe_frequency,
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&crusoe_voltage, &crusoe_percentage);
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printf("Crusoe LongRun support enabled, current mode: %d "
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"<%dMHz %dmV %d%%>\n", crusoe_longrun, crusoe_frequency,
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crusoe_voltage, crusoe_percentage);
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sysctl_ctx_init(&crusoe_sysctl_ctx);
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crusoe_sysctl_tree = SYSCTL_ADD_NODE(&crusoe_sysctl_ctx,
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SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
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"crusoe", CTLFLAG_RD, 0,
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"Transmeta Crusoe LongRun support");
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SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
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OID_AUTO, "longrun", CTLTYPE_INT | CTLFLAG_RW,
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&crusoe_longrun, 0, tmx86_longrun_sysctl, "I",
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"LongRun mode [0-3]");
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SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
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OID_AUTO, "frequency", CTLTYPE_INT | CTLFLAG_RD,
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&crusoe_frequency, 0, tmx86_status_sysctl, "I",
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"Current frequency (MHz)");
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SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
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OID_AUTO, "voltage", CTLTYPE_INT | CTLFLAG_RD,
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&crusoe_voltage, 0, tmx86_status_sysctl, "I",
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"Current voltage (mV)");
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SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
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OID_AUTO, "percentage", CTLTYPE_INT | CTLFLAG_RD,
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&crusoe_percentage, 0, tmx86_status_sysctl, "I",
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"Processing performance (%)");
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SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
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OID_AUTO, "performance_longrun", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_RW,
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&crusoe_performance_longrun, 0, tmx86_longrun_profile_sysctl, "I", "");
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SYSCTL_ADD_PROC(&crusoe_sysctl_ctx, SYSCTL_CHILDREN(crusoe_sysctl_tree),
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OID_AUTO, "economy_longrun", CTLTYPE_INT | CTLFLAG_RD | CTLFLAG_RW,
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&crusoe_economy_longrun, 0, tmx86_longrun_profile_sysctl, "I", "");
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/* register performance profile change handler */
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EVENTHANDLER_REGISTER(power_profile_change, tmx86_longrun_power_profile, NULL, 0);
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}
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SYSINIT(setup_tmx86_longrun, SI_SUB_CPU, SI_ORDER_ANY, setup_tmx86_longrun,
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NULL);
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