24072ca35b
i8253reg.h, and add some defines to control a speaker.
- Move PPI related defines from i386/isa/spkr.c into ppireg.h and use them.
- Move IO_{PPI,TIMER} defines into ppireg.h and timerreg.h respectively.
- Use isa/isareg.h rather than <arch>/isa/isa.h.
Tested on: i386, pc98
68 lines
2.2 KiB
C
68 lines
2.2 KiB
C
/*-
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* Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* The outputs of the three timers are connected as follows:
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*
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* timer 0 -> irq 0
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* timer 1 -> speaker (via keyboard controller)
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* timer 2 -> RS-232C
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*
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* Timer 0 is used to call hardclock.
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* Timer 1 is used to generate console beeps.
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*/
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#ifndef _MACHINE_TIMERREG_H_
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#define _MACHINE_TIMERREG_H_
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#ifdef _KERNEL
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#include <dev/ic/i8253reg.h>
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#define IO_TIMER1 0x71 /* 8253C Timer */
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#define TIMER_CNTR0 (IO_TIMER1 + TIMER_REG_CNTR0 * 2)
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#define TIMER_CNTR1 0x3fdb
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#define TIMER_CNTR2 (IO_TIMER1 + TIMER_REG_CNTR2 * 2)
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#define TIMER_MODE (IO_TIMER1 + TIMER_REG_MODE * 2)
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#define timer_spkr_acquire() \
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acquire_timer1(TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT)
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#define timer_spkr_release() \
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release_timer1()
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static __inline void
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spkr_set_pitch(u_int16_t pitch)
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{
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outb(TIMER_CNTR1, pitch & 0xff);
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outb(TIMER_CNTR1, pitch >> 8);
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}
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#endif /* _KERNEL */
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#endif /* _MACHINE_TIMERREG_H_ */
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