7439368f60
with the INTR_FILTER-enabled MI code. Basically this consists of registering an interrupt controller (of which there can be multiple and optionally different ones either per host-to-foo bridge or shared amongst host-to-foo bridges in any one machine) along with an interrupt vector as specific argument for all the interrupt vectors used by a given host-to-foo bridge (roughly similar to registering interrupt sources on amd64 and i386), providing functions to enable, clear and disable the interrupts of the children beneath the bridge. This also includes: - No longer entering a critical section in tl0_intr() and tl1_intr() for executing interrupt handlers but rather let the handlers enter it themselves so in the case of intr_event_handle() we don't enter a nested critical section. - Adding infrastructure for binding delivery of interrupt vectors to specific CPUs which later on can be interfaced with the code from amd64/i386 for binding interrupts to specific CPUs. - Getting rid of the wrapper hack introduced along the lines of the API changes for INTR_FILTER which as a side-effect caused interrupts associated with ithread handlers only to get the elevated priority of those associated with filters ("fast handlers") (this removes the hack also in the non-INTR_FILTER case). - Disabling (by not clearing) an interrupt in the interrupt controller until all associated handlers have been executed, which is crucial for the typical locking strategy of NIC drivers in order to work correctly in case of shared interrupts. This was a more or less theoretical problem on sparc64 though, as shared interrupts are rather uncommon there except for the on-board SCCs and UARTs. Note that due to the behavior of at least of some of the interrupt controllers used on sparc64 an enable+EOI instead of a disable+EOI approach (as implied by the INTR_FILTER MI code and implemented on other architectures) is used as the latter can cause lost interrupts or in the worst case interrupt starvation. o Correct a typo in sbus_alloc_resource() which caused (pass-through) allocations to only work down to the grandchildren of the bus, which wasn't a real problem so far as we don't support any devices which are great-grandchildren or greater of a U2S bridge, yet. o In fhc(4) use bus_{read,write}_4() instead of bus_space_{read,write}_4() in order to get rid of sc_bh and sc_bt in the fhc_softc. Also get rid of some other unneeded members in fhc_softc. Reviewed by: marcel (earlier version) Approved by: re (kensmith)
505 lines
14 KiB
C
505 lines
14 KiB
C
/*-
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* Copyright (c) 2003 Jake Burkholder.
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* Copyright (c) 2005 Marius Strobl <marius@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/pcpu.h>
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#include <dev/led/led.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/bus_common.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <sparc64/fhc/fhcreg.h>
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#include <sparc64/sbus/ofw_sbus.h>
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struct fhc_devinfo {
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struct ofw_bus_devinfo fdi_obdinfo;
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struct resource_list fdi_rl;
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};
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struct fhc_softc {
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struct resource *sc_memres[FHC_NREG];
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int sc_nrange;
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struct sbus_ranges *sc_ranges;
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int sc_ign;
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struct cdev *sc_led_dev;
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};
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static device_probe_t fhc_probe;
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static device_attach_t fhc_attach;
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static bus_print_child_t fhc_print_child;
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static bus_probe_nomatch_t fhc_probe_nomatch;
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static bus_setup_intr_t fhc_setup_intr;
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static bus_alloc_resource_t fhc_alloc_resource;
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static bus_get_resource_list_t fhc_get_resource_list;
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static ofw_bus_get_devinfo_t fhc_get_devinfo;
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static void fhc_intr_enable(void *);
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static void fhc_intr_disable(void *);
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static void fhc_intr_eoi(void *);
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static void fhc_led_func(void *, int);
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static int fhc_print_res(struct fhc_devinfo *);
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static device_method_t fhc_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, fhc_probe),
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DEVMETHOD(device_attach, fhc_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_print_child, fhc_print_child),
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DEVMETHOD(bus_probe_nomatch, fhc_probe_nomatch),
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DEVMETHOD(bus_setup_intr, fhc_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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DEVMETHOD(bus_alloc_resource, fhc_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_get_resource_list, fhc_get_resource_list),
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DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, fhc_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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{ NULL, NULL }
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};
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static driver_t fhc_driver = {
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"fhc",
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fhc_methods,
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sizeof(struct fhc_softc),
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};
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static devclass_t fhc_devclass;
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DRIVER_MODULE(fhc, central, fhc_driver, fhc_devclass, 0, 0);
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DRIVER_MODULE(fhc, nexus, fhc_driver, fhc_devclass, 0, 0);
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static const struct intr_controller fhc_ic = {
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fhc_intr_enable,
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fhc_intr_disable,
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fhc_intr_eoi
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};
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struct fhc_icarg {
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struct fhc_softc *fica_sc;
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struct resource *fica_memres;
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};
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static int
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fhc_probe(device_t dev)
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{
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if (strcmp(ofw_bus_get_name(dev), "fhc") == 0) {
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device_set_desc(dev, "fhc");
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return (0);
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}
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return (ENXIO);
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}
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static int
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fhc_attach(device_t dev)
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{
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char ledname[sizeof("boardXX")];
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struct fhc_devinfo *fdi;
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struct fhc_icarg *fica;
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struct fhc_softc *sc;
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struct sbus_regs *reg;
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phandle_t child;
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phandle_t node;
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device_t cdev;
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uint32_t board;
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uint32_t ctrl;
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uint32_t *intr;
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uint32_t iv;
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char *name;
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int central;
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int error;
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int i;
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int nintr;
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int nreg;
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int rid;
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sc = device_get_softc(dev);
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node = ofw_bus_get_node(dev);
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central = 0;
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if (strcmp(device_get_name(device_get_parent(dev)), "central") == 0)
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central = 1;
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for (i = 0; i < FHC_NREG; i++) {
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rid = i;
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sc->sc_memres[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&rid, RF_ACTIVE);
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if (sc->sc_memres[i] == NULL) {
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device_printf(dev, "cannot allocate resource %d\n", i);
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error = ENXIO;
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goto fail_memres;
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}
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}
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if (central != 0) {
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board = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_BSR);
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board = ((board >> 16) & 0x1) | ((board >> 12) & 0xe);
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} else {
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if (OF_getprop(node, "board#", &board, sizeof(board)) == -1) {
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device_printf(dev, "cannot get board number\n");
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error = ENXIO;
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goto fail_memres;
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}
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}
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device_printf(dev, "board %d, ", board);
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if (OF_getprop_alloc(node, "board-model", 1, (void **)&name) != -1) {
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printf("model %s\n", name);
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free(name, M_OFWPROP);
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} else
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printf("model unknown\n");
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for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
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bus_write_4(sc->sc_memres[i], FHC_ICLR, 0x0);
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(void)bus_read_4(sc->sc_memres[i], FHC_ICLR);
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}
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sc->sc_ign = board << 1;
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bus_write_4(sc->sc_memres[FHC_IGN], 0x0, sc->sc_ign);
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sc->sc_ign = bus_read_4(sc->sc_memres[FHC_IGN], 0x0);
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ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
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if (central == 0)
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ctrl |= FHC_CTRL_IXIST;
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ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
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bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
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(void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
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sc->sc_nrange = OF_getprop_alloc(node, "ranges",
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sizeof(*sc->sc_ranges), (void **)&sc->sc_ranges);
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if (sc->sc_nrange == -1) {
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device_printf(dev, "cannot get ranges\n");
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error = ENXIO;
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goto fail_memres;
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}
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/*
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* Apparently only the interrupt controller of boards hanging off
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* of central(4) is indented to be used, otherwise we would have
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* conflicts registering the interrupt controllers for all FHC
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* boards as the board number and thus the IGN isn't unique.
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*/
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if (central == 1) {
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/*
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* Hunt through all the interrupt mapping regs and register
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* our interrupt controller for the corresponding interrupt
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* vectors.
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*/
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for (i = FHC_FANFAIL; i <= FHC_TOD; i++) {
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fica = malloc(sizeof(*fica), M_DEVBUF, M_NOWAIT);
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if (fica == NULL)
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panic("%s: could not allocate interrupt "
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"controller argument", __func__);
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fica->fica_sc = sc;
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fica->fica_memres = sc->sc_memres[i];
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#ifdef FHC_DEBUG
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device_printf(dev, "intr map %d: %#lx, clr: %#lx\n", i,
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(u_long)bus_read_4(fica->fica_memres, FHC_IMAP),
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(u_long)bus_read_4(fica->fica_memres, FHC_ICLR));
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#endif
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/*
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* XXX we only pick the INO rather than the INR
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* from the IMR since the firmware may not provide
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* the IGN and the IGN is constant for all devices
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* on that FireHose controller.
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*/
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if (intr_controller_register(INTMAP_VEC(sc->sc_ign,
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INTINO(bus_read_4(fica->fica_memres, FHC_IMAP))),
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&fhc_ic, fica) != 0)
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panic("%s: could not register interrupt "
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"controller for map %d", __func__, i);
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}
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} else {
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snprintf(ledname, sizeof(ledname), "board%d", board);
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sc->sc_led_dev = led_create(fhc_led_func, sc, ledname);
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}
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for (child = OF_child(node); child != 0; child = OF_peer(child)) {
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fdi = malloc(sizeof(*fdi), M_DEVBUF, M_WAITOK | M_ZERO);
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if (ofw_bus_gen_setup_devinfo(&fdi->fdi_obdinfo, child) != 0) {
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free(fdi, M_DEVBUF);
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continue;
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}
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nreg = OF_getprop_alloc(child, "reg", sizeof(*reg),
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(void **)®);
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if (nreg == -1) {
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device_printf(dev, "<%s>: incomplete\n",
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fdi->fdi_obdinfo.obd_name);
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ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
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free(fdi, M_DEVBUF);
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continue;
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}
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resource_list_init(&fdi->fdi_rl);
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for (i = 0; i < nreg; i++)
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resource_list_add(&fdi->fdi_rl, SYS_RES_MEMORY, i,
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reg[i].sbr_offset, reg[i].sbr_offset +
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reg[i].sbr_size, reg[i].sbr_size);
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free(reg, M_OFWPROP);
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if (central == 1) {
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nintr = OF_getprop_alloc(child, "interrupts",
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sizeof(*intr), (void **)&intr);
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if (nintr != -1) {
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for (i = 0; i < nintr; i++) {
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iv = INTMAP_VEC(sc->sc_ign, intr[i]);
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resource_list_add(&fdi->fdi_rl,
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SYS_RES_IRQ, i, iv, iv, 1);
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}
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free(intr, M_OFWPROP);
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}
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}
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cdev = device_add_child(dev, NULL, -1);
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if (cdev == NULL) {
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device_printf(dev, "<%s>: device_add_child failed\n",
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fdi->fdi_obdinfo.obd_name);
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resource_list_free(&fdi->fdi_rl);
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ofw_bus_gen_destroy_devinfo(&fdi->fdi_obdinfo);
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free(fdi, M_DEVBUF);
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continue;
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}
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device_set_ivars(cdev, fdi);
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}
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return (bus_generic_attach(dev));
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fail_memres:
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for (i = 0; i < FHC_NREG; i++)
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if (sc->sc_memres[i] != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY,
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rman_get_rid(sc->sc_memres[i]), sc->sc_memres[i]);
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return (error);
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}
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static int
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fhc_print_child(device_t dev, device_t child)
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{
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int rv;
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rv = bus_print_child_header(dev, child);
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rv += fhc_print_res(device_get_ivars(child));
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rv += bus_print_child_footer(dev, child);
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return (rv);
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}
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static void
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fhc_probe_nomatch(device_t dev, device_t child)
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{
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const char *type;
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device_printf(dev, "<%s>", ofw_bus_get_name(child));
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fhc_print_res(device_get_ivars(child));
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type = ofw_bus_get_type(child);
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printf(" type %s (no driver attached)\n",
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type != NULL ? type : "unknown");
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}
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static void
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fhc_intr_enable(void *arg)
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{
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struct intr_vector *iv = arg;
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struct fhc_icarg *fica = iv->iv_icarg;
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bus_write_4(fica->fica_memres, FHC_IMAP,
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INTMAP_ENABLE(iv->iv_vec, iv->iv_mid));
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(void)bus_read_4(fica->fica_memres, FHC_IMAP);
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}
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static void
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fhc_intr_disable(void *arg)
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{
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struct intr_vector *iv = arg;
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struct fhc_icarg *fica = iv->iv_icarg;
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bus_write_4(fica->fica_memres, FHC_IMAP, iv->iv_vec);
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(void)bus_read_4(fica->fica_memres, FHC_IMAP);
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}
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static void
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fhc_intr_eoi(void *arg)
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{
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struct intr_vector *iv = arg;
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struct fhc_icarg *fica = iv->iv_icarg;
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bus_write_4(fica->fica_memres, FHC_ICLR, 0x0);
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(void)bus_read_4(fica->fica_memres, FHC_ICLR);
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}
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static int
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fhc_setup_intr(device_t bus, device_t child, struct resource *r, int flags,
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driver_filter_t *filt, driver_intr_t *func, void *arg, void **cookiep)
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{
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struct fhc_softc *sc;
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u_long vec;
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sc = device_get_softc(bus);
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/*
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* Make sure the vector is fully specified and we registered
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* our interrupt controller for it.
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*/
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vec = rman_get_start(r);
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if (INTIGN(vec) != sc->sc_ign || intr_vectors[vec].iv_ic != &fhc_ic) {
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device_printf(bus, "invalid interrupt vector 0x%lx\n", vec);
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return (EINVAL);
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}
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return (bus_generic_setup_intr(bus, child, r, flags, filt, func,
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arg, cookiep));
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}
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static struct resource *
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fhc_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct resource_list *rl;
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struct resource_list_entry *rle;
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struct fhc_softc *sc;
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struct resource *res;
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bus_addr_t coffset;
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bus_addr_t cend;
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bus_addr_t phys;
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int isdefault;
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int passthrough;
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int i;
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isdefault = (start == 0UL && end == ~0UL);
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passthrough = (device_get_parent(child) != bus);
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res = NULL;
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rle = NULL;
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rl = BUS_GET_RESOURCE_LIST(bus, child);
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sc = device_get_softc(bus);
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switch (type) {
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case SYS_RES_IRQ:
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return (resource_list_alloc(rl, bus, child, type, rid, start,
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end, count, flags));
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case SYS_RES_MEMORY:
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if (!passthrough) {
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rle = resource_list_find(rl, type, *rid);
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if (rle == NULL)
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return (NULL);
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if (rle->res != NULL)
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panic("%s: resource entry is busy", __func__);
|
|
if (isdefault) {
|
|
start = rle->start;
|
|
count = ulmax(count, rle->count);
|
|
end = ulmax(rle->end, start + count - 1);
|
|
}
|
|
}
|
|
for (i = 0; i < sc->sc_nrange; i++) {
|
|
coffset = sc->sc_ranges[i].coffset;
|
|
cend = coffset + sc->sc_ranges[i].size - 1;
|
|
if (start >= coffset && end <= cend) {
|
|
start -= coffset;
|
|
end -= coffset;
|
|
phys = sc->sc_ranges[i].poffset |
|
|
((bus_addr_t)sc->sc_ranges[i].pspace << 32);
|
|
res = bus_generic_alloc_resource(bus, child,
|
|
type, rid, phys + start, phys + end,
|
|
count, flags);
|
|
if (!passthrough)
|
|
rle->res = res;
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
return (res);
|
|
}
|
|
|
|
static struct resource_list *
|
|
fhc_get_resource_list(device_t bus, device_t child)
|
|
{
|
|
struct fhc_devinfo *fdi;
|
|
|
|
fdi = device_get_ivars(child);
|
|
return (&fdi->fdi_rl);
|
|
}
|
|
|
|
static const struct ofw_bus_devinfo *
|
|
fhc_get_devinfo(device_t bus, device_t child)
|
|
{
|
|
struct fhc_devinfo *fdi;
|
|
|
|
fdi = device_get_ivars(child);
|
|
return (&fdi->fdi_obdinfo);
|
|
}
|
|
|
|
static void
|
|
fhc_led_func(void *arg, int onoff)
|
|
{
|
|
struct fhc_softc *sc;
|
|
uint32_t ctrl;
|
|
|
|
sc = (struct fhc_softc *)arg;
|
|
|
|
ctrl = bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
|
|
if (onoff)
|
|
ctrl |= FHC_CTRL_RLED;
|
|
else
|
|
ctrl &= ~FHC_CTRL_RLED;
|
|
ctrl &= ~(FHC_CTRL_AOFF | FHC_CTRL_BOFF | FHC_CTRL_SLINE);
|
|
bus_write_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL, ctrl);
|
|
(void)bus_read_4(sc->sc_memres[FHC_INTERNAL], FHC_CTRL);
|
|
}
|
|
|
|
static int
|
|
fhc_print_res(struct fhc_devinfo *fdi)
|
|
{
|
|
int rv;
|
|
|
|
rv = 0;
|
|
rv += resource_list_print_type(&fdi->fdi_rl, "mem", SYS_RES_MEMORY,
|
|
"%#lx");
|
|
rv += resource_list_print_type(&fdi->fdi_rl, "irq", SYS_RES_IRQ, "%ld");
|
|
return (rv);
|
|
}
|