5e78bbb74a
This will allow us to add an ACPI attachment. Submitted by: Greg V <greg@unrelenting.technology> (earlier version) Sponsored by: Innovate UK
240 lines
5.9 KiB
C
240 lines
5.9 KiB
C
/*-
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* Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "pmu.h"
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static struct ofw_compat_data compat_data[] = {
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{"arm,armv8-pmuv3", 1},
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{"arm,cortex-a77-pmu", 1},
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{"arm,cortex-a76-pmu", 1},
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{"arm,cortex-a75-pmu", 1},
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{"arm,cortex-a73-pmu", 1},
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{"arm,cortex-a72-pmu", 1},
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{"arm,cortex-a65-pmu", 1},
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{"arm,cortex-a57-pmu", 1},
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{"arm,cortex-a55-pmu", 1},
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{"arm,cortex-a53-pmu", 1},
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{"arm,cortex-a34-pmu", 1},
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{"arm,cortex-a17-pmu", 1},
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{"arm,cortex-a15-pmu", 1},
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{"arm,cortex-a12-pmu", 1},
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{"arm,cortex-a9-pmu", 1},
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{"arm,cortex-a8-pmu", 1},
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{"arm,cortex-a7-pmu", 1},
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{"arm,cortex-a5-pmu", 1},
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{"arm,arm11mpcore-pmu", 1},
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{"arm,arm1176-pmu", 1},
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{"arm,arm1136-pmu", 1},
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{"qcom,krait-pmu", 1},
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{NULL, 0}
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};
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static int
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pmu_fdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) {
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device_set_desc(dev, "Performance Monitoring Unit");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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static int
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pmu_parse_affinity(device_t dev, struct pmu_softc *sc, struct pmu_intr *irq,
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phandle_t xref, uint32_t mpidr)
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{
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struct pcpu *pcpu;
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int i, err;
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if (xref != 0) {
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err = OF_getencprop(OF_node_from_xref(xref), "reg", &mpidr,
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sizeof(mpidr));
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if (err < 0) {
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device_printf(dev, "missing 'reg' property\n");
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return (ENXIO);
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}
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}
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for (i = 0; i < MAXCPU; i++) {
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pcpu = pcpu_find(i);
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if (pcpu != NULL && pcpu->pc_mpidr == mpidr) {
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irq->cpuid = i;
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return (0);
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}
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}
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device_printf(dev, "Cannot find CPU with MPIDR: 0x%08X\n", mpidr);
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return (ENXIO);
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}
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static int
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pmu_parse_intr(device_t dev, struct pmu_softc *sc)
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{
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bool has_affinity;
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phandle_t node, *cpus;
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int rid, err, ncpus, i;
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node = ofw_bus_get_node(dev);
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has_affinity = OF_hasprop(node, "interrupt-affinity");
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for (i = 0; i < MAX_RLEN; i++)
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sc->irq[i].cpuid = -1;
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cpus = NULL;
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if (has_affinity) {
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ncpus = OF_getencprop_alloc_multi(node, "interrupt-affinity",
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sizeof(*cpus), (void **)&cpus);
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if (ncpus < 0) {
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device_printf(dev,
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"Cannot read interrupt affinity property\n");
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return (ENXIO);
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}
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}
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/* Process first interrupt */
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rid = 0;
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sc->irq[0].res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE | RF_SHAREABLE);
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if (sc->irq[0].res == NULL) {
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device_printf(dev, "Cannot get interrupt\n");
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err = ENXIO;
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goto done;
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}
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/* Check if PMU have one per-CPU interrupt */
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if (intr_is_per_cpu(sc->irq[0].res)) {
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if (has_affinity) {
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device_printf(dev,
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"Per CPU interupt have declared affinity\n");
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err = ENXIO;
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goto done;
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}
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return (0);
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}
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/*
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* PMU with set of generic interrupts (one per core)
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* Each one must be binded to exact core.
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*/
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err = pmu_parse_affinity(dev, sc, sc->irq + 0,
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has_affinity ? cpus[0] : 0, 0);
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if (err != 0) {
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device_printf(dev, "Cannot parse affinity for CPUid: 0\n");
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goto done;
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}
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for (i = 1; i < MAX_RLEN; i++) {
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rid = i;
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sc->irq[i].res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&rid, RF_ACTIVE | RF_SHAREABLE);
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if (sc->irq[i].res == NULL)
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break;
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if (intr_is_per_cpu(sc->irq[i].res))
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{
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device_printf(dev, "Unexpected per CPU interupt\n");
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err = ENXIO;
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goto done;
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}
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if (has_affinity && i >= ncpus) {
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device_printf(dev, "Missing value in interrupt "
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"affinity property\n");
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err = ENXIO;
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goto done;
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}
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err = pmu_parse_affinity(dev, sc, sc->irq + i,
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has_affinity ? cpus[i] : 0, i);
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if (err != 0) {
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device_printf(dev,
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"Cannot parse affinity for CPUid: %d.\n", i);
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goto done;
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}
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}
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err = 0;
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done:
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OF_prop_free(cpus);
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return (err);
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}
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static int
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pmu_fdt_attach(device_t dev)
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{
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struct pmu_softc *sc;
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int err;
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sc = device_get_softc(dev);
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err = pmu_parse_intr(dev, sc);
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if (err != 0)
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return (err);
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return (pmu_attach(dev));
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}
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static device_method_t pmu_fdt_methods[] = {
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DEVMETHOD(device_probe, pmu_fdt_probe),
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DEVMETHOD(device_attach, pmu_fdt_attach),
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{ 0, 0 }
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};
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static driver_t pmu_fdt_driver = {
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"pmu",
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pmu_fdt_methods,
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sizeof(struct pmu_softc),
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};
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static devclass_t pmu_fdt_devclass;
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DRIVER_MODULE(pmu, simplebus, pmu_fdt_driver, pmu_fdt_devclass, 0, 0);
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