364 lines
8.8 KiB
ArmAsm
364 lines
8.8 KiB
ArmAsm
/*-
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* Copyright (c) 2003 Peter Wemm.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <machine/asmacros.h>
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#include <machine/specialreg.h>
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#include "assym.s"
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#include "opt_sched.h"
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/*****************************************************************************/
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/* Scheduling */
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/*****************************************************************************/
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.text
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#ifdef SMP
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#define LK lock ;
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#else
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#define LK
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#endif
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#if defined(SCHED_ULE) && defined(SMP)
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#define SETLK xchgq
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#else
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#define SETLK movq
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#endif
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/*
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* cpu_throw()
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*
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* This is the second half of cpu_switch(). It is used when the current
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* thread is either a dummy or slated to die, and we no longer care
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* about its state. This is only a slight optimization and is probably
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* not worth it anymore. Note that we need to clear the pm_active bits so
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* we do need the old proc if it still exists.
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* %rdi = oldtd
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* %rsi = newtd
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*/
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ENTRY(cpu_throw)
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movl PCPU(CPUID),%eax
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testq %rdi,%rdi
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jz 1f
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/* release bit from old pm_active */
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movq PCPU(CURPMAP),%rdx
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LK btrl %eax,PM_ACTIVE(%rdx) /* clear old */
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1:
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movq TD_PCB(%rsi),%r8 /* newtd->td_proc */
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movq PCB_CR3(%r8),%rdx
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movq %rdx,%cr3 /* new address space */
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jmp swact
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END(cpu_throw)
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/*
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* cpu_switch(old, new, mtx)
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*
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* Save the current thread state, then select the next thread to run
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* and load its state.
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* %rdi = oldtd
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* %rsi = newtd
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* %rdx = mtx
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*/
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ENTRY(cpu_switch)
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/* Switch to new thread. First, save context. */
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movq TD_PCB(%rdi),%r8
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orl $PCB_FULL_IRET,PCB_FLAGS(%r8)
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movq (%rsp),%rax /* Hardware registers */
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movq %r15,PCB_R15(%r8)
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movq %r14,PCB_R14(%r8)
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movq %r13,PCB_R13(%r8)
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movq %r12,PCB_R12(%r8)
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movq %rbp,PCB_RBP(%r8)
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movq %rsp,PCB_RSP(%r8)
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movq %rbx,PCB_RBX(%r8)
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movq %rax,PCB_RIP(%r8)
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testl $PCB_DBREGS,PCB_FLAGS(%r8)
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jnz store_dr /* static predict not taken */
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done_store_dr:
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/* have we used fp, and need a save? */
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cmpq %rdi,PCPU(FPCURTHREAD)
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jne 1f
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movq PCB_SAVEFPU(%r8),%r8
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clts
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fxsave (%r8)
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smsw %ax
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orb $CR0_TS,%al
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lmsw %ax
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xorl %eax,%eax
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movq %rax,PCPU(FPCURTHREAD)
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1:
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/* Save is done. Now fire up new thread. Leave old vmspace. */
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movq TD_PCB(%rsi),%r8
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/* switch address space */
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movq PCB_CR3(%r8),%rcx
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movq %cr3,%rax
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cmpq %rcx,%rax /* Same address space? */
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jne swinact
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SETLK %rdx, TD_LOCK(%rdi) /* Release the old thread */
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jmp sw1
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swinact:
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movq %rcx,%cr3 /* new address space */
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movl PCPU(CPUID), %eax
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/* Release bit from old pmap->pm_active */
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movq PCPU(CURPMAP),%rcx
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LK btrl %eax,PM_ACTIVE(%rcx) /* clear old */
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SETLK %rdx, TD_LOCK(%rdi) /* Release the old thread */
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swact:
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/* Set bit in new pmap->pm_active */
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movq TD_PROC(%rsi),%rdx /* newproc */
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movq P_VMSPACE(%rdx), %rdx
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addq $VM_PMAP,%rdx
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LK btsl %eax,PM_ACTIVE(%rdx) /* set new */
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movq %rdx,PCPU(CURPMAP)
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sw1:
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#if defined(SCHED_ULE) && defined(SMP)
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/* Wait for the new thread to become unblocked */
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movq $blocked_lock, %rdx
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1:
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movq TD_LOCK(%rsi),%rcx
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cmpq %rcx, %rdx
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pause
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je 1b
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#endif
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/*
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* At this point, we've switched address spaces and are ready
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* to load up the rest of the next context.
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*/
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/* Skip loading user fsbase/gsbase for kthreads */
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testl $TDP_KTHREAD,TD_PFLAGS(%rsi)
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jnz do_kthread
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/*
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* Load ldt register
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*/
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movq TD_PROC(%rsi),%rcx
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cmpq $0, P_MD+MD_LDT(%rcx)
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jne do_ldt
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xorl %eax,%eax
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ld_ldt: lldt %ax
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/* Restore fs base in GDT */
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movl PCB_FSBASE(%r8),%eax
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movq PCPU(FS32P),%rdx
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movw %ax,2(%rdx)
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shrl $16,%eax
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movb %al,4(%rdx)
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shrl $8,%eax
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movb %al,7(%rdx)
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/* Restore gs base in GDT */
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movl PCB_GSBASE(%r8),%eax
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movq PCPU(GS32P),%rdx
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movw %ax,2(%rdx)
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shrl $16,%eax
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movb %al,4(%rdx)
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shrl $8,%eax
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movb %al,7(%rdx)
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do_kthread:
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/* Do we need to reload tss ? */
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movq PCPU(TSSP),%rax
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movq PCB_TSSP(%r8),%rdx
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testq %rdx,%rdx
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cmovzq PCPU(COMMONTSSP),%rdx
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cmpq %rax,%rdx
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jne do_tss
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done_tss:
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movq %r8,PCPU(RSP0)
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movq %r8,PCPU(CURPCB)
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/* Update the TSS_RSP0 pointer for the next interrupt */
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movq %r8,COMMON_TSS_RSP0(%rdx)
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movq %rsi,PCPU(CURTHREAD) /* into next thread */
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/* Test if debug registers should be restored. */
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testl $PCB_DBREGS,PCB_FLAGS(%r8)
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jnz load_dr /* static predict not taken */
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done_load_dr:
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/* Restore context. */
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movq PCB_R15(%r8),%r15
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movq PCB_R14(%r8),%r14
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movq PCB_R13(%r8),%r13
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movq PCB_R12(%r8),%r12
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movq PCB_RBP(%r8),%rbp
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movq PCB_RSP(%r8),%rsp
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movq PCB_RBX(%r8),%rbx
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movq PCB_RIP(%r8),%rax
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movq %rax,(%rsp)
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ret
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/*
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* We order these strangely for several reasons.
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* 1: I wanted to use static branch prediction hints
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* 2: Most athlon64/opteron cpus don't have them. They define
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* a forward branch as 'predict not taken'. Intel cores have
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* the 'rep' prefix to invert this.
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* So, to make it work on both forms of cpu we do the detour.
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* We use jumps rather than call in order to avoid the stack.
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*/
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store_dr:
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movq %dr7,%rax /* yes, do the save */
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movq %dr0,%r15
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movq %dr1,%r14
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movq %dr2,%r13
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movq %dr3,%r12
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movq %dr6,%r11
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movq %r15,PCB_DR0(%r8)
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movq %r14,PCB_DR1(%r8)
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movq %r13,PCB_DR2(%r8)
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movq %r12,PCB_DR3(%r8)
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movq %r11,PCB_DR6(%r8)
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movq %rax,PCB_DR7(%r8)
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andq $0x0000fc00, %rax /* disable all watchpoints */
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movq %rax,%dr7
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jmp done_store_dr
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load_dr:
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movq %dr7,%rax
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movq PCB_DR0(%r8),%r15
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movq PCB_DR1(%r8),%r14
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movq PCB_DR2(%r8),%r13
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movq PCB_DR3(%r8),%r12
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movq PCB_DR6(%r8),%r11
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movq PCB_DR7(%r8),%rcx
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movq %r15,%dr0
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movq %r14,%dr1
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/* Preserve reserved bits in %dr7 */
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andq $0x0000fc00,%rax
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andq $~0x0000fc00,%rcx
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movq %r13,%dr2
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movq %r12,%dr3
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orq %rcx,%rax
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movq %r11,%dr6
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movq %rax,%dr7
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jmp done_load_dr
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do_tss: movq %rdx,PCPU(TSSP)
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movq %rdx,%rcx
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movq PCPU(TSS),%rax
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movw %cx,2(%rax)
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shrq $16,%rcx
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movb %cl,4(%rax)
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shrq $8,%rcx
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movb %cl,7(%rax)
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shrq $8,%rcx
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movl %ecx,8(%rax)
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movb $0x89,5(%rax) /* unset busy */
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movl $TSSSEL,%eax
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ltr %ax
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jmp done_tss
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do_ldt: movq PCPU(LDT),%rax
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movq P_MD+MD_LDT_SD(%rcx),%rdx
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movq %rdx,(%rax)
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movq P_MD+MD_LDT_SD+8(%rcx),%rdx
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movq %rdx,8(%rax)
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movl $LDTSEL,%eax
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jmp ld_ldt
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END(cpu_switch)
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/*
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* savectx(pcb)
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* Update pcb, saving current processor state.
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*/
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ENTRY(savectx)
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/* Save caller's return address. */
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movq (%rsp),%rax
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movq %rax,PCB_RIP(%rdi)
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movq %rbx,PCB_RBX(%rdi)
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movq %rsp,PCB_RSP(%rdi)
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movq %rbp,PCB_RBP(%rdi)
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movq %r12,PCB_R12(%rdi)
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movq %r13,PCB_R13(%rdi)
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movq %r14,PCB_R14(%rdi)
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movq %r15,PCB_R15(%rdi)
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movq %cr0,%rsi
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movq %rsi,PCB_CR0(%rdi)
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movq %cr2,%rax
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movq %rax,PCB_CR2(%rdi)
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movq %cr3,%rax
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movq %rax,PCB_CR3(%rdi)
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movq %cr4,%rax
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movq %rax,PCB_CR4(%rdi)
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movq %dr0,%rax
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movq %rax,PCB_DR0(%rdi)
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movq %dr1,%rax
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movq %rax,PCB_DR1(%rdi)
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movq %dr2,%rax
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movq %rax,PCB_DR2(%rdi)
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movq %dr3,%rax
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movq %rax,PCB_DR3(%rdi)
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movq %dr6,%rax
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movq %rax,PCB_DR6(%rdi)
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movq %dr7,%rax
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movq %rax,PCB_DR7(%rdi)
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movl $MSR_FSBASE,%ecx
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rdmsr
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movl %eax,PCB_FSBASE(%rdi)
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movl %edx,PCB_FSBASE+4(%rdi)
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movl $MSR_GSBASE,%ecx
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rdmsr
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movl %eax,PCB_GSBASE(%rdi)
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movl %edx,PCB_GSBASE+4(%rdi)
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movl $MSR_KGSBASE,%ecx
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rdmsr
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movl %eax,PCB_KGSBASE(%rdi)
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movl %edx,PCB_KGSBASE+4(%rdi)
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sgdt PCB_GDT(%rdi)
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sidt PCB_IDT(%rdi)
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sldt PCB_LDT(%rdi)
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str PCB_TR(%rdi)
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clts
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fxsave PCB_USERFPU(%rdi)
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movq %rsi,%cr0 /* The previous %cr0 is saved in %rsi. */
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movl $1,%eax
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ret
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END(savectx)
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