4100d71132
- This is heavily derived from John Baldwin's apic/pci cleanup on i386. - I have completely rewritten or drastically cleaned up some other parts. (in particular, bootstrap) - This is still a WIP. It seems that there are some highly bogus bioses on nVidia nForce3-150 boards. I can't stress how broken these boards are. I have a workaround in mind, but right now the Asus SK8N is broken. The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed. - Most of my testing has been with SCHED_ULE. SCHED_4BSD works. - the apic and acpi components are 'standard'. - If you have an nVidia nForce3-150 board, you are stuck with 'device atpic' in addition, because they somehow managed to forget to connect the 8254 timer to the apic, even though its in the same silicon! ARGH! This directly violates the ACPI spec.
227 lines
9.2 KiB
C
227 lines
9.2 KiB
C
/*-
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* Copyright (c) 1989, 1990 William F. Jolitz
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)segments.h 7.1 (Berkeley) 5/9/91
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* $FreeBSD$
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*/
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#ifndef _MACHINE_SEGMENTS_H_
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#define _MACHINE_SEGMENTS_H_
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/*
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* AMD64 Segmentation Data Structures and definitions
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*/
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/*
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* Selectors
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*/
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#define SEL_RPL_MASK 3 /* requester priv level */
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#define ISPL(s) ((s)&3) /* what is the priority level of a selector */
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#define SEL_KPL 0 /* kernel priority level */
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#define SEL_UPL 3 /* user priority level */
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#define ISLDT(s) ((s)&SEL_LDT) /* is it local or global */
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#define SEL_LDT 4 /* local descriptor table */
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#define IDXSEL(s) (((s)>>3) & 0x1fff) /* index of selector */
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#define LSEL(s,r) (((s)<<3) | SEL_LDT | r) /* a local selector */
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#define GSEL(s,r) (((s)<<3) | r) /* a global selector */
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/*
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* User segment descriptors (%cs, %ds etc for compatability apps. 64 bit wide)
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* For long-mode apps, %cs only has the conforming bit in sd_type, the sd_dpl,
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* sd_p, sd_l and sd_def32 which must be zero). %ds only has sd_p.
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*/
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struct user_segment_descriptor {
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u_int64_t sd_lolimit:16; /* segment extent (lsb) */
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u_int64_t sd_lobase:24; /* segment base address (lsb) */
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u_int64_t sd_type:5; /* segment type */
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u_int64_t sd_dpl:2; /* segment descriptor priority level */
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u_int64_t sd_p:1; /* segment descriptor present */
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u_int64_t sd_hilimit:4; /* segment extent (msb) */
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u_int64_t sd_xx:1; /* unused */
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u_int64_t sd_long:1; /* long mode (cs only) */
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u_int64_t sd_def32:1; /* default 32 vs 16 bit size */
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u_int64_t sd_gran:1; /* limit granularity (byte/page units)*/
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u_int64_t sd_hibase:8; /* segment base address (msb) */
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} __packed;
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/*
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* System segment descriptors (128 bit wide)
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*/
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struct system_segment_descriptor {
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u_int64_t sd_lolimit:16; /* segment extent (lsb) */
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u_int64_t sd_lobase:24; /* segment base address (lsb) */
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u_int64_t sd_type:5; /* segment type */
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u_int64_t sd_dpl:2; /* segment descriptor priority level */
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u_int64_t sd_p:1; /* segment descriptor present */
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u_int64_t sd_hilimit:4; /* segment extent (msb) */
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u_int64_t sd_xx0:3; /* unused */
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u_int64_t sd_gran:1; /* limit granularity (byte/page units)*/
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u_int64_t sd_hibase:40 __packed;/* segment base address (msb) */
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u_int64_t sd_xx1:8;
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u_int64_t sd_mbz:5; /* MUST be zero */
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u_int64_t sd_xx2:19;
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} __packed;
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/*
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* Gate descriptors (e.g. indirect descriptors, trap, interrupt etc. 128 bit)
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* Only interrupt and trap gates have gd_ist.
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*/
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struct gate_descriptor {
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u_int64_t gd_looffset:16; /* gate offset (lsb) */
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u_int64_t gd_selector:16; /* gate segment selector */
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u_int64_t gd_ist:3; /* IST table index */
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u_int64_t gd_xx:5; /* unused */
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u_int64_t gd_type:5; /* segment type */
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u_int64_t gd_dpl:2; /* segment descriptor priority level */
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u_int64_t gd_p:1; /* segment descriptor present */
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u_int64_t gd_hioffset:48 __packed; /* gate offset (msb) */
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u_int64_t sd_xx1:32;
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} __packed;
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/* system segments and gate types */
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#define SDT_SYSNULL 0 /* system null */
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#define SDT_SYSLDT 2 /* system 64 bit local descriptor table */
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#define SDT_SYSTSS 9 /* system available 64 bit TSS */
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#define SDT_SYSBSY 11 /* system busy 64 bit TSS */
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#define SDT_SYSCGT 12 /* system 64 bit call gate */
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#define SDT_SYSIGT 14 /* system 64 bit interrupt gate */
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#define SDT_SYSTGT 15 /* system 64 bit trap gate */
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/* memory segment types */
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#define SDT_MEMRO 16 /* memory read only */
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#define SDT_MEMROA 17 /* memory read only accessed */
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#define SDT_MEMRW 18 /* memory read write */
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#define SDT_MEMRWA 19 /* memory read write accessed */
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#define SDT_MEMROD 20 /* memory read only expand dwn limit */
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#define SDT_MEMRODA 21 /* memory read only expand dwn limit accessed */
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#define SDT_MEMRWD 22 /* memory read write expand dwn limit */
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#define SDT_MEMRWDA 23 /* memory read write expand dwn limit accessed */
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#define SDT_MEME 24 /* memory execute only */
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#define SDT_MEMEA 25 /* memory execute only accessed */
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#define SDT_MEMER 26 /* memory execute read */
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#define SDT_MEMERA 27 /* memory execute read accessed */
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#define SDT_MEMEC 28 /* memory execute only conforming */
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#define SDT_MEMEAC 29 /* memory execute only accessed conforming */
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#define SDT_MEMERC 30 /* memory execute read conforming */
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#define SDT_MEMERAC 31 /* memory execute read accessed conforming */
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/*
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* Software definitions are in this convenient format,
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* which are translated into inconvenient segment descriptors
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* when needed to be used by the 386 hardware
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*/
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struct soft_segment_descriptor {
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unsigned long ssd_base; /* segment base address */
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unsigned long ssd_limit; /* segment extent */
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unsigned long ssd_type:5; /* segment type */
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unsigned long ssd_dpl:2; /* segment descriptor priority level */
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unsigned long ssd_p:1; /* segment descriptor present */
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unsigned long ssd_long:1; /* long mode (for %cs) */
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unsigned long ssd_def32:1; /* default 32 vs 16 bit size */
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unsigned long ssd_gran:1; /* limit granularity (byte/page units)*/
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} __packed;
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/*
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* region descriptors, used to load gdt/idt tables before segments yet exist.
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*/
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struct region_descriptor {
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unsigned long rd_limit:16; /* segment extent */
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unsigned long rd_base:64 __packed; /* base address */
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} __packed;
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/*
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* Size of IDT table
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*/
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#define NIDT 256 /* 32 reserved, 16 h/w, 0 s/w, linux's 0x80 */
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#define NRSVIDT 32 /* reserved entries for cpu exceptions */
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/*
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* Entries in the Interrupt Descriptor Table (IDT)
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*/
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#define IDT_DE 0 /* #DE: Divide Error */
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#define IDT_DB 1 /* #DB: Debug */
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#define IDT_NMI 2 /* Nonmaskable External Interrupt */
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#define IDT_BP 3 /* #BP: Breakpoint */
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#define IDT_OF 4 /* #OF: Overflow */
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#define IDT_BR 5 /* #BR: Bound Range Exceeded */
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#define IDT_UD 6 /* #UD: Undefined/Invalid Opcode */
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#define IDT_NM 7 /* #NM: No Math Coprocessor */
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#define IDT_DF 8 /* #DF: Double Fault */
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#define IDT_FPUGP 9 /* Coprocessor Segment Overrun */
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#define IDT_TS 10 /* #TS: Invalid TSS */
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#define IDT_NP 11 /* #NP: Segment Not Present */
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#define IDT_SS 12 /* #SS: Stack Segment Fault */
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#define IDT_GP 13 /* #GP: General Protection Fault */
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#define IDT_PF 14 /* #PF: Page Fault */
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#define IDT_MF 16 /* #MF: FPU Floating-Point Error */
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#define IDT_AC 17 /* #AC: Alignment Check */
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#define IDT_MC 18 /* #MC: Machine Check */
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#define IDT_XF 19 /* #XF: SIMD Floating-Point Exception */
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#define IDT_IO_INTS NRSVIDT /* Base of IDT entries for I/O interrupts. */
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#define IDT_SYSCALL 0x80 /* System Call Interrupt Vector */
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/*
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* Entries in the Global Descriptor Table (GDT)
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*/
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#define GNULL_SEL 0 /* Null Descriptor */
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#define GCODE_SEL 1 /* Kernel Code Descriptor */
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#define GDATA_SEL 2 /* Kernel Data Descriptor */
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#define GUCODE32_SEL 3 /* User 32 bit code Descriptor */
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#define GUDATA_SEL 4 /* User 32/64 bit Data Descriptor */
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#define GUCODE_SEL 5 /* User 64 bit Code Descriptor */
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#define GPROC0_SEL 6 /* TSS for entering kernel etc */
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/* slot 6 is second half of GPROC0_SEL */
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#define NGDT 8
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#ifdef _KERNEL
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extern struct user_segment_descriptor gdt[];
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extern struct soft_segment_descriptor gdt_segs[];
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extern struct gate_descriptor *idt;
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extern struct region_descriptor r_gdt, r_idt;
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void lgdt(struct region_descriptor *rdp);
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void sdtossd(struct user_segment_descriptor *sdp,
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struct soft_segment_descriptor *ssdp);
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void ssdtosd(struct soft_segment_descriptor *ssdp,
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struct user_segment_descriptor *sdp);
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void ssdtosyssd(struct soft_segment_descriptor *ssdp,
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struct system_segment_descriptor *sdp);
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#endif /* _KERNEL */
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#endif /* !_MACHINE_SEGMENTS_H_ */
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