ae7a480f1c
needed as this compiles fine w/o it.
241 lines
5.3 KiB
C
241 lines
5.3 KiB
C
/*-
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* Copyright (c) 2007 Bruce M. Simpson.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <machine/cpuregs.h>
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#include <mips/sentry5/s5reg.h>
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/imgact.h>
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#include <sys/bio.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/cons.h>
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#include <sys/exec.h>
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#include <sys/ucontext.h>
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#include <sys/proc.h>
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#include <sys/kdb.h>
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#include <sys/ptrace.h>
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#include <sys/reboot.h>
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#include <sys/signalvar.h>
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#include <sys/sysent.h>
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#include <sys/sysproto.h>
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#include <sys/user.h>
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#include <vm/vm.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/vm_pager.h>
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#include <machine/cache.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/cpuinfo.h>
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#include <machine/cpufunc.h>
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#include <machine/cpuregs.h>
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#include <machine/hwfunc.h>
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#include <machine/intr_machdep.h>
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#include <machine/locore.h>
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#include <machine/md_var.h>
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#include <machine/pte.h>
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#include <machine/sigframe.h>
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#include <machine/trap.h>
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#include <machine/vmparam.h>
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#ifdef CFE
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#include <dev/cfe/cfe_api.h>
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#endif
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#ifdef CFE
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extern uint32_t cfe_handle;
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extern uint32_t cfe_vector;
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#endif
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extern int *edata;
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extern int *end;
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static void
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mips_init(void)
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{
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int i;
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printf("entry: mips_init()\n");
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#ifdef CFE
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/*
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* Query DRAM memory map from CFE.
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*/
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physmem = 0;
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for (i = 0; i < 10; i += 2) {
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int result;
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uint64_t addr, len, type;
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result = cfe_enummem(i, 0, &addr, &len, &type);
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if (result < 0) {
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phys_avail[i] = phys_avail[i + 1] = 0;
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break;
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}
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if (type != CFE_MI_AVAILABLE)
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continue;
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phys_avail[i] = addr;
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if (i == 0 && addr == 0) {
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/*
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* If this is the first physical memory segment probed
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* from CFE, omit the region at the start of physical
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* memory where the kernel has been loaded.
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*/
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phys_avail[i] += MIPS_KSEG0_TO_PHYS((vm_offset_t)&end);
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}
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phys_avail[i + 1] = addr + len;
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physmem += len;
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}
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realmem = btoc(physmem);
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#endif
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physmem = realmem;
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init_param1();
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init_param2(physmem);
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mips_cpu_init();
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pmap_bootstrap();
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mips_proc0_init();
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mutex_init();
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#ifdef DDB
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kdb_init();
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#endif
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}
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void
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platform_halt(void)
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{
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}
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void
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platform_identify(void)
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{
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}
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void
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platform_reset(void)
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{
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#if defined(CFE)
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cfe_exit(0, 0);
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#else
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*((volatile uint8_t *)MIPS_PHYS_TO_KSEG1(SENTRY5_EXTIFADR)) = 0x80;
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#endif
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}
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void
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platform_trap_enter(void)
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{
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}
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void
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platform_trap_exit(void)
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{
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}
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void
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platform_start(__register_t a0 __unused, __register_t a1 __unused,
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__register_t a2 __unused, __register_t a3 __unused)
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{
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vm_offset_t kernend;
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uint64_t platform_counter_freq;
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/* clear the BSS and SBSS segments */
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kernend = round_page((vm_offset_t)&end);
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memset(&edata, 0, kernend - (vm_offset_t)(&edata));
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#ifdef CFE
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/*
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* Initialize CFE firmware trampolines before
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* we initialize the low-level console.
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*/
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if (cfe_handle != 0)
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cfe_init(cfe_handle, cfe_vector);
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#endif
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cninit();
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#ifdef CFE
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if (cfe_handle == 0)
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panic("CFE was not detected by locore.\n");
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#endif
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mips_init();
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# if 0
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/*
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* Probe the Broadcom Sentry5's on-chip PLL clock registers
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* and discover the CPU pipeline clock and bus clock
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* multipliers from this.
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* XXX: Wrong place. You have to ask the ChipCommon
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* or External Interface cores on the SiBa.
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*/
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uint32_t busmult, cpumult, refclock, clkcfg1;
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#define S5_CLKCFG1_REFCLOCK_MASK 0x0000001F
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#define S5_CLKCFG1_BUSMULT_MASK 0x000003E0
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#define S5_CLKCFG1_BUSMULT_SHIFT 5
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#define S5_CLKCFG1_CPUMULT_MASK 0xFFFFFC00
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#define S5_CLKCFG1_CPUMULT_SHIFT 10
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counter_freq = 100000000; /* XXX */
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clkcfg1 = s5_rd_clkcfg1();
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printf("clkcfg1 = 0x%08x\n", clkcfg1);
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refclock = clkcfg1 & 0x1F;
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busmult = ((clkcfg1 & 0x000003E0) >> 5) + 1;
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cpumult = ((clkcfg1 & 0xFFFFFC00) >> 10) + 1;
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printf("refclock = %u\n", refclock);
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printf("busmult = %u\n", busmult);
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printf("cpumult = %u\n", cpumult);
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counter_freq = cpumult * refclock;
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# else
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platform_counter_freq = 200 * 1000 * 1000; /* Sentry5 is 200MHz */
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# endif
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mips_timer_init_params(platform_counter_freq, 0);
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}
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