1952e2e1c1
These bits are taken from the FSF anoncvs repo on 1-Feb-2002 08:20 PST.
874 lines
24 KiB
C
874 lines
24 KiB
C
/* Generate code from machine description to emit insns as rtl.
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Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000, 2001
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Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 2, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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02111-1307, USA. */
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#include "hconfig.h"
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#include "system.h"
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#include "rtl.h"
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#include "errors.h"
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#include "gensupport.h"
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static int max_opno;
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static int max_dup_opno;
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static int max_scratch_opno;
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static int register_constraints;
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static int insn_code_number;
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static int insn_index_number;
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/* Data structure for recording the patterns of insns that have CLOBBERs.
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We use this to output a function that adds these CLOBBERs to a
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previously-allocated PARALLEL expression. */
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struct clobber_pat
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{
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struct clobber_ent *insns;
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rtx pattern;
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int first_clobber;
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struct clobber_pat *next;
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int has_hard_reg;
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} *clobber_list;
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/* Records one insn that uses the clobber list. */
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struct clobber_ent
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{
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int code_number; /* Counts only insns. */
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struct clobber_ent *next;
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};
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static void max_operand_1 PARAMS ((rtx));
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static int max_operand_vec PARAMS ((rtx, int));
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static void print_code PARAMS ((RTX_CODE));
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static void gen_exp PARAMS ((rtx, enum rtx_code));
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static void gen_insn PARAMS ((rtx));
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static void gen_expand PARAMS ((rtx));
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static void gen_split PARAMS ((rtx));
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static void output_add_clobbers PARAMS ((void));
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static void output_added_clobbers_hard_reg_p PARAMS ((void));
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static void gen_rtx_scratch PARAMS ((rtx, enum rtx_code));
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static void output_peephole2_scratches PARAMS ((rtx));
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static void
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max_operand_1 (x)
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rtx x;
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{
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RTX_CODE code;
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int i;
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int len;
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const char *fmt;
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if (x == 0)
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return;
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code = GET_CODE (x);
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if (code == MATCH_OPERAND && XSTR (x, 2) != 0 && *XSTR (x, 2) != '\0')
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register_constraints = 1;
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if (code == MATCH_SCRATCH && XSTR (x, 1) != 0 && *XSTR (x, 1) != '\0')
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register_constraints = 1;
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if (code == MATCH_OPERAND || code == MATCH_OPERATOR
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|| code == MATCH_PARALLEL)
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max_opno = MAX (max_opno, XINT (x, 0));
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if (code == MATCH_DUP || code == MATCH_OP_DUP || code == MATCH_PAR_DUP)
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max_dup_opno = MAX (max_dup_opno, XINT (x, 0));
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if (code == MATCH_SCRATCH)
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max_scratch_opno = MAX (max_scratch_opno, XINT (x, 0));
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fmt = GET_RTX_FORMAT (code);
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len = GET_RTX_LENGTH (code);
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for (i = 0; i < len; i++)
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{
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if (fmt[i] == 'e' || fmt[i] == 'u')
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max_operand_1 (XEXP (x, i));
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else if (fmt[i] == 'E')
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{
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int j;
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for (j = 0; j < XVECLEN (x, i); j++)
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max_operand_1 (XVECEXP (x, i, j));
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}
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}
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}
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static int
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max_operand_vec (insn, arg)
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rtx insn;
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int arg;
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{
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int len = XVECLEN (insn, arg);
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int i;
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max_opno = -1;
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max_dup_opno = -1;
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max_scratch_opno = -1;
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for (i = 0; i < len; i++)
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max_operand_1 (XVECEXP (insn, arg, i));
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return max_opno + 1;
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}
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static void
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print_code (code)
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RTX_CODE code;
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{
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const char *p1;
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for (p1 = GET_RTX_NAME (code); *p1; p1++)
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putchar (TOUPPER(*p1));
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}
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static void
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gen_rtx_scratch (x, subroutine_type)
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rtx x;
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enum rtx_code subroutine_type;
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{
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if (subroutine_type == DEFINE_PEEPHOLE2)
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{
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printf ("operand%d", XINT (x, 0));
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}
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else
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{
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printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x)));
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}
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}
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/* Print a C expression to construct an RTX just like X,
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substituting any operand references appearing within. */
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static void
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gen_exp (x, subroutine_type)
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rtx x;
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enum rtx_code subroutine_type;
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{
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RTX_CODE code;
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int i;
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int len;
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const char *fmt;
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if (x == 0)
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{
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printf ("NULL_RTX");
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return;
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}
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code = GET_CODE (x);
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switch (code)
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{
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case MATCH_OPERAND:
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case MATCH_DUP:
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printf ("operand%d", XINT (x, 0));
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return;
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case MATCH_OP_DUP:
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printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x, 0));
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if (GET_MODE (x) == VOIDmode)
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printf ("GET_MODE (operand%d)", XINT (x, 0));
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else
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printf ("%smode", GET_MODE_NAME (GET_MODE (x)));
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for (i = 0; i < XVECLEN (x, 1); i++)
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{
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printf (",\n\t\t");
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gen_exp (XVECEXP (x, 1, i), subroutine_type);
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}
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printf (")");
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return;
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case MATCH_OPERATOR:
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printf ("gen_rtx (GET_CODE (operand%d)", XINT (x, 0));
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printf (", %smode", GET_MODE_NAME (GET_MODE (x)));
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for (i = 0; i < XVECLEN (x, 2); i++)
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{
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printf (",\n\t\t");
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gen_exp (XVECEXP (x, 2, i), subroutine_type);
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}
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printf (")");
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return;
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case MATCH_PARALLEL:
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case MATCH_PAR_DUP:
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printf ("operand%d", XINT (x, 0));
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return;
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case MATCH_SCRATCH:
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gen_rtx_scratch (x, subroutine_type);
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return;
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case ADDRESS:
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fatal ("ADDRESS expression code used in named instruction pattern");
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case PC:
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printf ("pc_rtx");
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return;
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case CC0:
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printf ("cc0_rtx");
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return;
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case CONST_INT:
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if (INTVAL (x) == 0)
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printf ("const0_rtx");
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else if (INTVAL (x) == 1)
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printf ("const1_rtx");
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else if (INTVAL (x) == -1)
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printf ("constm1_rtx");
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else if (INTVAL (x) == STORE_FLAG_VALUE)
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printf ("const_true_rtx");
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else
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{
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printf ("GEN_INT (");
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printf (HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
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printf (")");
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}
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return;
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case CONST_DOUBLE:
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/* These shouldn't be written in MD files. Instead, the appropriate
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routines in varasm.c should be called. */
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abort ();
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default:
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break;
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}
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printf ("gen_rtx_");
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print_code (code);
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printf (" (%smode", GET_MODE_NAME (GET_MODE (x)));
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fmt = GET_RTX_FORMAT (code);
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len = GET_RTX_LENGTH (code);
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for (i = 0; i < len; i++)
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{
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if (fmt[i] == '0')
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break;
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printf (",\n\t");
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if (fmt[i] == 'e' || fmt[i] == 'u')
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gen_exp (XEXP (x, i), subroutine_type);
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else if (fmt[i] == 'i')
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printf ("%u", XINT (x, i));
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else if (fmt[i] == 's')
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printf ("\"%s\"", XSTR (x, i));
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else if (fmt[i] == 'E')
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{
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int j;
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printf ("gen_rtvec (%d", XVECLEN (x, i));
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for (j = 0; j < XVECLEN (x, i); j++)
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{
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printf (",\n\t\t");
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gen_exp (XVECEXP (x, i, j), subroutine_type);
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}
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printf (")");
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}
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else
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abort ();
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}
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printf (")");
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}
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/* Generate the `gen_...' function for a DEFINE_INSN. */
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static void
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gen_insn (insn)
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rtx insn;
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{
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int operands;
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int i;
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/* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
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registers or MATCH_SCRATCHes. If so, store away the information for
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later. */
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if (XVEC (insn, 1))
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{
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int has_hard_reg = 0;
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for (i = XVECLEN (insn, 1) - 1; i > 0; i--)
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{
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if (GET_CODE (XVECEXP (insn, 1, i)) != CLOBBER)
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break;
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if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) == REG)
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has_hard_reg = 1;
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else if (GET_CODE (XEXP (XVECEXP (insn, 1, i), 0)) != MATCH_SCRATCH)
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break;
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}
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if (i != XVECLEN (insn, 1) - 1)
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{
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struct clobber_pat *p;
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struct clobber_ent *link
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= (struct clobber_ent *) xmalloc (sizeof (struct clobber_ent));
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int j;
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link->code_number = insn_code_number;
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/* See if any previous CLOBBER_LIST entry is the same as this
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one. */
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for (p = clobber_list; p; p = p->next)
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{
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if (p->first_clobber != i + 1
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|| XVECLEN (p->pattern, 1) != XVECLEN (insn, 1))
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continue;
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for (j = i + 1; j < XVECLEN (insn, 1); j++)
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{
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rtx old = XEXP (XVECEXP (p->pattern, 1, j), 0);
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rtx new = XEXP (XVECEXP (insn, 1, j), 0);
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/* OLD and NEW are the same if both are to be a SCRATCH
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of the same mode,
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or if both are registers of the same mode and number. */
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if (! (GET_MODE (old) == GET_MODE (new)
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&& ((GET_CODE (old) == MATCH_SCRATCH
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&& GET_CODE (new) == MATCH_SCRATCH)
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|| (GET_CODE (old) == REG && GET_CODE (new) == REG
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&& REGNO (old) == REGNO (new)))))
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break;
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}
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if (j == XVECLEN (insn, 1))
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break;
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}
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if (p == 0)
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{
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p = (struct clobber_pat *) xmalloc (sizeof (struct clobber_pat));
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p->insns = 0;
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p->pattern = insn;
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p->first_clobber = i + 1;
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p->next = clobber_list;
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p->has_hard_reg = has_hard_reg;
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clobber_list = p;
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}
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link->next = p->insns;
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p->insns = link;
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}
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}
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/* Don't mention instructions whose names are the null string
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or begin with '*'. They are in the machine description just
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to be recognized. */
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if (XSTR (insn, 0)[0] == 0 || XSTR (insn, 0)[0] == '*')
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return;
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/* Find out how many operands this function has,
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and also whether any of them have register constraints. */
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register_constraints = 0;
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operands = max_operand_vec (insn, 1);
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if (max_dup_opno >= operands)
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fatal ("match_dup operand number has no match_operand");
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/* Output the function name and argument declarations. */
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printf ("rtx\ngen_%s (", XSTR (insn, 0));
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for (i = 0; i < operands; i++)
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if (i)
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printf (", operand%d", i);
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else
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printf ("operand%d", i);
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printf (")\n");
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for (i = 0; i < operands; i++)
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printf (" rtx operand%d;\n", i);
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printf ("{\n");
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/* Output code to construct and return the rtl for the instruction body */
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if (XVECLEN (insn, 1) == 1)
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{
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printf (" return ");
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gen_exp (XVECEXP (insn, 1, 0), DEFINE_INSN);
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printf (";\n}\n\n");
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}
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else
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{
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printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
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XVECLEN (insn, 1));
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for (i = 0; i < XVECLEN (insn, 1); i++)
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{
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printf (",\n\t\t");
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gen_exp (XVECEXP (insn, 1, i), DEFINE_INSN);
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}
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printf ("));\n}\n\n");
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}
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}
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/* Generate the `gen_...' function for a DEFINE_EXPAND. */
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static void
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gen_expand (expand)
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rtx expand;
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{
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int operands;
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int i;
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if (strlen (XSTR (expand, 0)) == 0)
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fatal ("define_expand lacks a name");
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if (XVEC (expand, 1) == 0)
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fatal ("define_expand for %s lacks a pattern", XSTR (expand, 0));
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/* Find out how many operands this function has,
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and also whether any of them have register constraints. */
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register_constraints = 0;
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operands = max_operand_vec (expand, 1);
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/* Output the function name and argument declarations. */
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printf ("rtx\ngen_%s (", XSTR (expand, 0));
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for (i = 0; i < operands; i++)
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if (i)
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printf (", operand%d", i);
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else
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printf ("operand%d", i);
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printf (")\n");
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for (i = 0; i < operands; i++)
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printf (" rtx operand%d;\n", i);
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printf ("{\n");
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/* If we don't have any C code to write, only one insn is being written,
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and no MATCH_DUPs are present, we can just return the desired insn
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like we do for a DEFINE_INSN. This saves memory. */
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if ((XSTR (expand, 3) == 0 || *XSTR (expand, 3) == '\0')
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&& operands > max_dup_opno
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&& XVECLEN (expand, 1) == 1)
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{
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printf (" return ");
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gen_exp (XVECEXP (expand, 1, 0), DEFINE_EXPAND);
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printf (";\n}\n\n");
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return;
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}
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/* For each operand referred to only with MATCH_DUPs,
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make a local variable. */
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for (i = operands; i <= max_dup_opno; i++)
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printf (" rtx operand%d;\n", i);
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for (; i <= max_scratch_opno; i++)
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printf (" rtx operand%d ATTRIBUTE_UNUSED;\n", i);
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printf (" rtx _val = 0;\n");
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printf (" start_sequence ();\n");
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/* The fourth operand of DEFINE_EXPAND is some code to be executed
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before the actual construction.
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This code expects to refer to `operands'
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just as the output-code in a DEFINE_INSN does,
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but here `operands' is an automatic array.
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So copy the operand values there before executing it. */
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if (XSTR (expand, 3) && *XSTR (expand, 3))
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{
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printf (" {\n");
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if (operands > 0 || max_dup_opno >= 0 || max_scratch_opno >= 0)
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printf (" rtx operands[%d];\n",
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MAX (operands, MAX (max_scratch_opno, max_dup_opno) + 1));
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/* Output code to copy the arguments into `operands'. */
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for (i = 0; i < operands; i++)
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printf (" operands[%d] = operand%d;\n", i, i);
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/* Output the special code to be executed before the sequence
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is generated. */
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printf ("%s\n", XSTR (expand, 3));
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/* Output code to copy the arguments back out of `operands'
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(unless we aren't going to use them at all). */
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if (XVEC (expand, 1) != 0)
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{
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for (i = 0; i < operands; i++)
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printf (" operand%d = operands[%d];\n", i, i);
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for (; i <= max_dup_opno; i++)
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printf (" operand%d = operands[%d];\n", i, i);
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for (; i <= max_scratch_opno; i++)
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printf (" operand%d = operands[%d];\n", i, i);
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}
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printf (" }\n");
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}
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/* Output code to construct the rtl for the instruction bodies.
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Use emit_insn to add them to the sequence being accumulated.
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But don't do this if the user's code has set `no_more' nonzero. */
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for (i = 0; i < XVECLEN (expand, 1); i++)
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{
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rtx next = XVECEXP (expand, 1, i);
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if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
|
||
|| (GET_CODE (next) == PARALLEL
|
||
&& GET_CODE (XVECEXP (next, 0, 0)) == SET
|
||
&& GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
|
||
|| GET_CODE (next) == RETURN)
|
||
printf (" emit_jump_insn (");
|
||
else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
|
||
|| GET_CODE (next) == CALL
|
||
|| (GET_CODE (next) == PARALLEL
|
||
&& GET_CODE (XVECEXP (next, 0, 0)) == SET
|
||
&& GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
|
||
|| (GET_CODE (next) == PARALLEL
|
||
&& GET_CODE (XVECEXP (next, 0, 0)) == CALL))
|
||
printf (" emit_call_insn (");
|
||
else if (GET_CODE (next) == CODE_LABEL)
|
||
printf (" emit_label (");
|
||
else if (GET_CODE (next) == MATCH_OPERAND
|
||
|| GET_CODE (next) == MATCH_DUP
|
||
|| GET_CODE (next) == MATCH_OPERATOR
|
||
|| GET_CODE (next) == MATCH_OP_DUP
|
||
|| GET_CODE (next) == MATCH_PARALLEL
|
||
|| GET_CODE (next) == MATCH_PAR_DUP
|
||
|| GET_CODE (next) == PARALLEL)
|
||
printf (" emit (");
|
||
else
|
||
printf (" emit_insn (");
|
||
gen_exp (next, DEFINE_EXPAND);
|
||
printf (");\n");
|
||
if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
|
||
&& GET_CODE (SET_SRC (next)) == LABEL_REF)
|
||
printf (" emit_barrier ();");
|
||
}
|
||
|
||
/* Call `gen_sequence' to make a SEQUENCE out of all the
|
||
insns emitted within this gen_... function. */
|
||
|
||
printf (" _val = gen_sequence ();\n");
|
||
printf (" end_sequence ();\n");
|
||
printf (" return _val;\n}\n\n");
|
||
}
|
||
|
||
/* Like gen_expand, but generates a SEQUENCE. */
|
||
|
||
static void
|
||
gen_split (split)
|
||
rtx split;
|
||
{
|
||
int i;
|
||
int operands;
|
||
const char *const name =
|
||
((GET_CODE (split) == DEFINE_PEEPHOLE2) ? "peephole2" : "split");
|
||
const char *unused;
|
||
|
||
if (XVEC (split, 0) == 0)
|
||
fatal ("define_%s (definition %d) lacks a pattern", name,
|
||
insn_index_number);
|
||
else if (XVEC (split, 2) == 0)
|
||
fatal ("define_%s (definition %d) lacks a replacement pattern", name,
|
||
insn_index_number);
|
||
|
||
/* Find out how many operands this function has. */
|
||
|
||
max_operand_vec (split, 2);
|
||
operands = MAX (max_opno, MAX (max_dup_opno, max_scratch_opno)) + 1;
|
||
unused = (operands == 0 ? " ATTRIBUTE_UNUSED" : "");
|
||
|
||
/* Output the prototype, function name and argument declarations. */
|
||
if (GET_CODE (split) == DEFINE_PEEPHOLE2)
|
||
{
|
||
printf ("extern rtx gen_%s_%d PARAMS ((rtx, rtx *));\n",
|
||
name, insn_code_number);
|
||
printf ("rtx\ngen_%s_%d (curr_insn, operands)\n",
|
||
name, insn_code_number);
|
||
printf (" rtx curr_insn ATTRIBUTE_UNUSED;\n");
|
||
printf (" rtx *operands%s;\n", unused);
|
||
}
|
||
else
|
||
{
|
||
printf ("extern rtx gen_split_%d PARAMS ((rtx *));\n", insn_code_number);
|
||
printf ("rtx\ngen_%s_%d (operands)\n", name, insn_code_number);
|
||
printf (" rtx *operands%s;\n", unused);
|
||
}
|
||
printf ("{\n");
|
||
|
||
/* Declare all local variables. */
|
||
for (i = 0; i < operands; i++)
|
||
printf (" rtx operand%d;\n", i);
|
||
printf (" rtx _val = 0;\n");
|
||
|
||
if (GET_CODE (split) == DEFINE_PEEPHOLE2)
|
||
output_peephole2_scratches (split);
|
||
|
||
printf (" start_sequence ();\n");
|
||
|
||
/* The fourth operand of DEFINE_SPLIT is some code to be executed
|
||
before the actual construction. */
|
||
|
||
if (XSTR (split, 3))
|
||
printf ("%s\n", XSTR (split, 3));
|
||
|
||
/* Output code to copy the arguments back out of `operands' */
|
||
for (i = 0; i < operands; i++)
|
||
printf (" operand%d = operands[%d];\n", i, i);
|
||
|
||
/* Output code to construct the rtl for the instruction bodies.
|
||
Use emit_insn to add them to the sequence being accumulated.
|
||
But don't do this if the user's code has set `no_more' nonzero. */
|
||
|
||
for (i = 0; i < XVECLEN (split, 2); i++)
|
||
{
|
||
rtx next = XVECEXP (split, 2, i);
|
||
if ((GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC)
|
||
|| (GET_CODE (next) == PARALLEL
|
||
&& GET_CODE (XVECEXP (next, 0, 0)) == SET
|
||
&& GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
|
||
|| GET_CODE (next) == RETURN)
|
||
printf (" emit_jump_insn (");
|
||
else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
|
||
|| GET_CODE (next) == CALL
|
||
|| (GET_CODE (next) == PARALLEL
|
||
&& GET_CODE (XVECEXP (next, 0, 0)) == SET
|
||
&& GET_CODE (SET_SRC (XVECEXP (next, 0, 0))) == CALL)
|
||
|| (GET_CODE (next) == PARALLEL
|
||
&& GET_CODE (XVECEXP (next, 0, 0)) == CALL))
|
||
printf (" emit_call_insn (");
|
||
else if (GET_CODE (next) == CODE_LABEL)
|
||
printf (" emit_label (");
|
||
else if (GET_CODE (next) == MATCH_OPERAND
|
||
|| GET_CODE (next) == MATCH_OPERATOR
|
||
|| GET_CODE (next) == MATCH_PARALLEL
|
||
|| GET_CODE (next) == MATCH_OP_DUP
|
||
|| GET_CODE (next) == MATCH_DUP
|
||
|| GET_CODE (next) == PARALLEL)
|
||
printf (" emit (");
|
||
else
|
||
printf (" emit_insn (");
|
||
gen_exp (next, GET_CODE (split));
|
||
printf (");\n");
|
||
if (GET_CODE (next) == SET && GET_CODE (SET_DEST (next)) == PC
|
||
&& GET_CODE (SET_SRC (next)) == LABEL_REF)
|
||
printf (" emit_barrier ();");
|
||
}
|
||
|
||
/* Call `gen_sequence' to make a SEQUENCE out of all the
|
||
insns emitted within this gen_... function. */
|
||
|
||
printf (" _val = gen_sequence ();\n");
|
||
printf (" end_sequence ();\n");
|
||
printf (" return _val;\n}\n\n");
|
||
}
|
||
|
||
/* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
|
||
size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
|
||
the end of the vector. */
|
||
|
||
static void
|
||
output_add_clobbers ()
|
||
{
|
||
struct clobber_pat *clobber;
|
||
struct clobber_ent *ent;
|
||
int i;
|
||
|
||
printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
|
||
printf (" rtx pattern ATTRIBUTE_UNUSED;\n int insn_code_number;\n");
|
||
printf ("{\n");
|
||
printf (" switch (insn_code_number)\n");
|
||
printf (" {\n");
|
||
|
||
for (clobber = clobber_list; clobber; clobber = clobber->next)
|
||
{
|
||
for (ent = clobber->insns; ent; ent = ent->next)
|
||
printf (" case %d:\n", ent->code_number);
|
||
|
||
for (i = clobber->first_clobber; i < XVECLEN (clobber->pattern, 1); i++)
|
||
{
|
||
printf (" XVECEXP (pattern, 0, %d) = ", i);
|
||
gen_exp (XVECEXP (clobber->pattern, 1, i),
|
||
GET_CODE (clobber->pattern));
|
||
printf (";\n");
|
||
}
|
||
|
||
printf (" break;\n\n");
|
||
}
|
||
|
||
printf (" default:\n");
|
||
printf (" abort ();\n");
|
||
printf (" }\n");
|
||
printf ("}\n");
|
||
}
|
||
|
||
/* Write a function, `added_clobbers_hard_reg_p' this is given an insn_code
|
||
number that needs clobbers and returns 1 if they include a clobber of a
|
||
hard reg and 0 if they just clobber SCRATCH. */
|
||
|
||
static void
|
||
output_added_clobbers_hard_reg_p ()
|
||
{
|
||
struct clobber_pat *clobber;
|
||
struct clobber_ent *ent;
|
||
int clobber_p;
|
||
|
||
printf ("\n\nint\nadded_clobbers_hard_reg_p (insn_code_number)\n");
|
||
printf (" int insn_code_number;\n");
|
||
printf ("{\n");
|
||
printf (" switch (insn_code_number)\n");
|
||
printf (" {\n");
|
||
|
||
for (clobber_p = 0; clobber_p <= 1; clobber_p++)
|
||
{
|
||
for (clobber = clobber_list; clobber; clobber = clobber->next)
|
||
if (clobber->has_hard_reg == clobber_p)
|
||
for (ent = clobber->insns; ent; ent = ent->next)
|
||
printf (" case %d:\n", ent->code_number);
|
||
|
||
printf (" return %d;\n\n", clobber_p);
|
||
}
|
||
|
||
printf (" default:\n");
|
||
printf (" abort ();\n");
|
||
printf (" }\n");
|
||
printf ("}\n");
|
||
}
|
||
|
||
/* Generate code to invoke find_free_register () as needed for the
|
||
scratch registers used by the peephole2 pattern in SPLIT. */
|
||
|
||
static void
|
||
output_peephole2_scratches (split)
|
||
rtx split;
|
||
{
|
||
int i;
|
||
int insn_nr = 0;
|
||
|
||
printf (" HARD_REG_SET _regs_allocated;\n");
|
||
printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
|
||
|
||
for (i = 0; i < XVECLEN (split, 0); i++)
|
||
{
|
||
rtx elt = XVECEXP (split, 0, i);
|
||
if (GET_CODE (elt) == MATCH_SCRATCH)
|
||
{
|
||
int last_insn_nr = insn_nr;
|
||
int cur_insn_nr = insn_nr;
|
||
int j;
|
||
for (j = i + 1; j < XVECLEN (split, 0); j++)
|
||
if (GET_CODE (XVECEXP (split, 0, j)) == MATCH_DUP)
|
||
{
|
||
if (XINT (XVECEXP (split, 0, j), 0) == XINT (elt, 0))
|
||
last_insn_nr = cur_insn_nr;
|
||
}
|
||
else if (GET_CODE (XVECEXP (split, 0, j)) != MATCH_SCRATCH)
|
||
cur_insn_nr++;
|
||
|
||
printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
|
||
return NULL;\n",
|
||
XINT (elt, 0),
|
||
insn_nr, last_insn_nr,
|
||
XSTR (elt, 1),
|
||
GET_MODE_NAME (GET_MODE (elt)));
|
||
|
||
}
|
||
else if (GET_CODE (elt) != MATCH_DUP)
|
||
insn_nr++;
|
||
}
|
||
}
|
||
|
||
extern int main PARAMS ((int, char **));
|
||
|
||
int
|
||
main (argc, argv)
|
||
int argc;
|
||
char **argv;
|
||
{
|
||
rtx desc;
|
||
|
||
progname = "genemit";
|
||
|
||
if (argc <= 1)
|
||
fatal ("no input file name");
|
||
|
||
if (init_md_reader_args (argc, argv) != SUCCESS_EXIT_CODE)
|
||
return (FATAL_EXIT_CODE);
|
||
|
||
/* Assign sequential codes to all entries in the machine description
|
||
in parallel with the tables in insn-output.c. */
|
||
|
||
insn_code_number = 0;
|
||
insn_index_number = 0;
|
||
|
||
printf ("/* Generated automatically by the program `genemit'\n\
|
||
from the machine description file `md'. */\n\n");
|
||
|
||
printf ("#include \"config.h\"\n");
|
||
printf ("#include \"system.h\"\n");
|
||
printf ("#include \"rtl.h\"\n");
|
||
printf ("#include \"tm_p.h\"\n");
|
||
printf ("#include \"function.h\"\n");
|
||
printf ("#include \"expr.h\"\n");
|
||
printf ("#include \"optabs.h\"\n");
|
||
printf ("#include \"real.h\"\n");
|
||
printf ("#include \"flags.h\"\n");
|
||
printf ("#include \"output.h\"\n");
|
||
printf ("#include \"insn-config.h\"\n");
|
||
printf ("#include \"hard-reg-set.h\"\n");
|
||
printf ("#include \"recog.h\"\n");
|
||
printf ("#include \"resource.h\"\n");
|
||
printf ("#include \"reload.h\"\n");
|
||
printf ("#include \"toplev.h\"\n");
|
||
printf ("#include \"ggc.h\"\n\n");
|
||
printf ("#define FAIL return (end_sequence (), _val)\n");
|
||
printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n");
|
||
|
||
/* Read the machine description. */
|
||
|
||
while (1)
|
||
{
|
||
int line_no;
|
||
|
||
desc = read_md_rtx (&line_no, &insn_code_number);
|
||
if (desc == NULL)
|
||
break;
|
||
|
||
switch (GET_CODE (desc))
|
||
{
|
||
case DEFINE_INSN:
|
||
gen_insn (desc);
|
||
break;
|
||
|
||
case DEFINE_EXPAND:
|
||
gen_expand (desc);
|
||
break;
|
||
|
||
case DEFINE_SPLIT:
|
||
gen_split (desc);
|
||
break;
|
||
|
||
case DEFINE_PEEPHOLE2:
|
||
gen_split (desc);
|
||
break;
|
||
|
||
default:
|
||
break;
|
||
}
|
||
++insn_index_number;
|
||
}
|
||
|
||
/* Write out the routines to add CLOBBERs to a pattern and say whether they
|
||
clobber a hard reg. */
|
||
output_add_clobbers ();
|
||
output_added_clobbers_hard_reg_p ();
|
||
|
||
fflush (stdout);
|
||
return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
|
||
}
|
||
|
||
/* Define this so we can link with print-rtl.o to get debug_rtx function. */
|
||
const char *
|
||
get_insn_name (code)
|
||
int code ATTRIBUTE_UNUSED;
|
||
{
|
||
return NULL;
|
||
}
|