2b3ad18853
The ci20 port (by kan@) is going to reuse almost all of the intrng code since the SoC in question looks suspiciously like someone took an ARM SoC design and replaced the ARM core with a MIPS core. * migrate out the code; * rename ARM_ -> INTR_; * rename arm_ -> intr_; * move the interrupt flush routine from intr.c / intrng.c into arm/machdep_intr.c - removing the code duplication and removing the ARM specific bits from here. Thanks to the Star Wars: The Force Awakens premiere line for allowing me a couple hours of quiet time to finish the universe builds. Tested: * make universe TODO: * The structure definitions in subr_intr.c still includes machine/intr.h which requires one duplicates all of the intrng definitions in the platform code (which kan has done, and I think we don't have to.) Instead I should break out the generic things (function declarations, common intr structures, etc) into a separate header. * Kan has requested I make the PIC based IPI stuff optional.
114 lines
2.6 KiB
C
114 lines
2.6 KiB
C
/*-
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* Copyright (c) 2015 Andrew Turner
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/pcpu.h>
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#include <sys/smp.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/intr.h>
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#include <machine/smp.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_cpu.h>
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#include <dev/psci/psci.h>
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static int running_cpus;
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int
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platform_mp_probe(void)
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{
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return (mp_ncpus > 1);
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}
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static boolean_t
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virt_maxid(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg)
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{
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if (mp_maxid < id)
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mp_maxid = id;
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return (true);
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}
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void
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platform_mp_setmaxid(void)
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{
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mp_maxid = PCPU_GET(cpuid);
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mp_ncpus = ofw_cpu_early_foreach(virt_maxid, true);
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if (mp_ncpus < 1)
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mp_ncpus = 1;
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mp_ncpus = MIN(mp_ncpus, MAXCPU);
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}
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static boolean_t
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virt_start_ap(u_int id, phandle_t node, u_int addr_cells, pcell_t *reg)
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{
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int err;
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if (running_cpus >= mp_ncpus)
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return (false);
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running_cpus++;
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err = psci_cpu_on(*reg, pmap_kextract((vm_offset_t)mpentry), id);
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if (err != PSCI_RETVAL_SUCCESS)
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return (false);
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return (true);
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}
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void
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platform_mp_start_ap(void)
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{
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ofw_cpu_early_foreach(virt_start_ap, true);
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}
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void
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platform_mp_init_secondary(void)
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{
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intr_pic_init_secondary();
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}
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void
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platform_ipi_send(cpuset_t cpus, u_int ipi)
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{
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pic_ipi_send(cpus, ipi);
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}
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