c5ad99fc69
Remove any chipset specific usage of Rx descriptor structure / bits from common code to prevent misuse of fields that may differ between various chipsets. Checked with: RTL8821AU in STA mode.
794 lines
21 KiB
C
794 lines
21 KiB
C
/* $OpenBSD: if_urtwn.c,v 1.16 2011/02/10 17:26:40 jakemsr Exp $ */
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/*-
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* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
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* Copyright (c) 2014 Kevin Lo <kevlo@FreeBSD.org>
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* Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/sysctl.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/mbuf.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/linker.h>
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#include <sys/kdb.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <net/if.h>
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#include <net/ethernet.h>
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#include <net/if_media.h>
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#include <net80211/ieee80211_var.h>
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#include <dev/rtwn/if_rtwnreg.h>
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#include <dev/rtwn/if_rtwnvar.h>
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#include <dev/rtwn/if_rtwn_nop.h>
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#include <dev/rtwn/if_rtwn_debug.h>
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#include <dev/rtwn/pci/rtwn_pci_var.h>
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#include <dev/rtwn/pci/rtwn_pci_attach.h>
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#include <dev/rtwn/pci/rtwn_pci_reg.h>
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#include <dev/rtwn/pci/rtwn_pci_rx.h>
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#include <dev/rtwn/pci/rtwn_pci_tx.h>
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#include <dev/rtwn/rtl8192c/pci/r92ce_reg.h>
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static device_probe_t rtwn_pci_probe;
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static device_attach_t rtwn_pci_attach;
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static device_detach_t rtwn_pci_detach;
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static device_shutdown_t rtwn_pci_shutdown;
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static device_suspend_t rtwn_pci_suspend;
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static device_resume_t rtwn_pci_resume;
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static int rtwn_pci_alloc_rx_list(struct rtwn_softc *);
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static void rtwn_pci_reset_rx_list(struct rtwn_softc *);
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static void rtwn_pci_free_rx_list(struct rtwn_softc *);
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static int rtwn_pci_alloc_tx_list(struct rtwn_softc *, int);
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static void rtwn_pci_reset_tx_ring_stopped(struct rtwn_softc *, int);
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static void rtwn_pci_reset_beacon_ring(struct rtwn_softc *, int);
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static void rtwn_pci_reset_tx_list(struct rtwn_softc *,
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struct ieee80211vap *, int);
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static void rtwn_pci_free_tx_list(struct rtwn_softc *, int);
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static void rtwn_pci_reset_lists(struct rtwn_softc *,
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struct ieee80211vap *);
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static int rtwn_pci_fw_write_block(struct rtwn_softc *,
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const uint8_t *, uint16_t, int);
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static uint16_t rtwn_pci_get_qmap(struct rtwn_softc *);
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static void rtwn_pci_set_desc_addr(struct rtwn_softc *);
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static void rtwn_pci_beacon_update_begin(struct rtwn_softc *,
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struct ieee80211vap *);
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static void rtwn_pci_beacon_update_end(struct rtwn_softc *,
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struct ieee80211vap *);
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static void rtwn_pci_attach_methods(struct rtwn_softc *);
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static const struct rtwn_pci_ident *
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rtwn_pci_probe_sub(device_t dev)
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{
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const struct rtwn_pci_ident *ident;
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int vendor_id, device_id;
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vendor_id = pci_get_vendor(dev);
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device_id = pci_get_device(dev);
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for (ident = rtwn_pci_ident_table; ident->name != NULL; ident++)
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if (vendor_id == ident->vendor && device_id == ident->device)
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return (ident);
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return (NULL);
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}
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static int
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rtwn_pci_probe(device_t dev)
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{
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const struct rtwn_pci_ident *ident;
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ident = rtwn_pci_probe_sub(dev);
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if (ident != NULL) {
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device_set_desc(dev, ident->name);
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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static int
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rtwn_pci_alloc_rx_list(struct rtwn_softc *sc)
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{
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struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
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struct rtwn_rx_ring *rx_ring = &pc->rx_ring;
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struct rtwn_rx_data *rx_data;
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bus_size_t size;
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int i, error;
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/* Allocate Rx descriptors. */
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size = sizeof(struct rtwn_rx_stat_pci) * RTWN_PCI_RX_LIST_COUNT;
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error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
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size, 1, size, 0, NULL, NULL, &rx_ring->desc_dmat);
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if (error != 0) {
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device_printf(sc->sc_dev, "could not create rx desc DMA tag\n");
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goto fail;
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}
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error = bus_dmamem_alloc(rx_ring->desc_dmat, (void **)&rx_ring->desc,
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BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT,
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&rx_ring->desc_map);
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if (error != 0) {
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device_printf(sc->sc_dev, "could not allocate rx desc\n");
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goto fail;
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}
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error = bus_dmamap_load(rx_ring->desc_dmat, rx_ring->desc_map,
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rx_ring->desc, size, rtwn_pci_dma_map_addr, &rx_ring->paddr, 0);
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if (error != 0) {
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device_printf(sc->sc_dev, "could not load rx desc DMA map\n");
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goto fail;
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}
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bus_dmamap_sync(rx_ring->desc_dmat, rx_ring->desc_map,
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BUS_DMASYNC_PREWRITE);
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/* Create RX buffer DMA tag. */
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error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
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MJUMPAGESIZE, 1, MJUMPAGESIZE, 0, NULL, NULL, &rx_ring->data_dmat);
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if (error != 0) {
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device_printf(sc->sc_dev, "could not create rx buf DMA tag\n");
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goto fail;
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}
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/* Allocate Rx buffers. */
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for (i = 0; i < RTWN_PCI_RX_LIST_COUNT; i++) {
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rx_data = &rx_ring->rx_data[i];
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error = bus_dmamap_create(rx_ring->data_dmat, 0, &rx_data->map);
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if (error != 0) {
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device_printf(sc->sc_dev,
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"could not create rx buf DMA map\n");
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goto fail;
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}
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rx_data->m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR,
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MJUMPAGESIZE);
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if (rx_data->m == NULL) {
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device_printf(sc->sc_dev,
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"could not allocate rx mbuf\n");
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error = ENOMEM;
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goto fail;
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}
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error = bus_dmamap_load(rx_ring->data_dmat, rx_data->map,
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mtod(rx_data->m, void *), MJUMPAGESIZE,
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rtwn_pci_dma_map_addr, &rx_data->paddr, BUS_DMA_NOWAIT);
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if (error != 0) {
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device_printf(sc->sc_dev,
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"could not load rx buf DMA map");
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goto fail;
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}
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rtwn_pci_setup_rx_desc(pc, &rx_ring->desc[i], rx_data->paddr,
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MJUMPAGESIZE, i);
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}
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rx_ring->cur = 0;
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return (0);
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fail:
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rtwn_pci_free_rx_list(sc);
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return (error);
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}
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static void
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rtwn_pci_reset_rx_list(struct rtwn_softc *sc)
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{
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struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
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struct rtwn_rx_ring *rx_ring = &pc->rx_ring;
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struct rtwn_rx_data *rx_data;
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int i;
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for (i = 0; i < RTWN_PCI_RX_LIST_COUNT; i++) {
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rx_data = &rx_ring->rx_data[i];
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rtwn_pci_setup_rx_desc(pc, &rx_ring->desc[i],
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rx_data->paddr, MJUMPAGESIZE, i);
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}
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rx_ring->cur = 0;
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}
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static void
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rtwn_pci_free_rx_list(struct rtwn_softc *sc)
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{
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struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
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struct rtwn_rx_ring *rx_ring = &pc->rx_ring;
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struct rtwn_rx_data *rx_data;
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int i;
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if (rx_ring->desc_dmat != NULL) {
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if (rx_ring->desc != NULL) {
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bus_dmamap_sync(rx_ring->desc_dmat,
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rx_ring->desc_map,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(rx_ring->desc_dmat,
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rx_ring->desc_map);
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bus_dmamem_free(rx_ring->desc_dmat, rx_ring->desc,
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rx_ring->desc_map);
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rx_ring->desc = NULL;
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}
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bus_dma_tag_destroy(rx_ring->desc_dmat);
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rx_ring->desc_dmat = NULL;
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}
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for (i = 0; i < RTWN_PCI_RX_LIST_COUNT; i++) {
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rx_data = &rx_ring->rx_data[i];
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if (rx_data->m != NULL) {
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bus_dmamap_sync(rx_ring->data_dmat,
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rx_data->map, BUS_DMASYNC_POSTREAD);
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bus_dmamap_unload(rx_ring->data_dmat, rx_data->map);
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m_freem(rx_data->m);
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rx_data->m = NULL;
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}
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bus_dmamap_destroy(rx_ring->data_dmat, rx_data->map);
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rx_data->map = NULL;
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}
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if (rx_ring->data_dmat != NULL) {
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bus_dma_tag_destroy(rx_ring->data_dmat);
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rx_ring->data_dmat = NULL;
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}
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}
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static int
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rtwn_pci_alloc_tx_list(struct rtwn_softc *sc, int qid)
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{
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struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
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struct rtwn_tx_ring *tx_ring = &pc->tx_ring[qid];
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bus_size_t size;
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int i, error;
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size = sc->txdesc_len * RTWN_PCI_TX_LIST_COUNT;
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error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), PAGE_SIZE, 0,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
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size, 1, size, 0, NULL, NULL, &tx_ring->desc_dmat);
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if (error != 0) {
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device_printf(sc->sc_dev, "could not create tx ring DMA tag\n");
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goto fail;
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}
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error = bus_dmamem_alloc(tx_ring->desc_dmat, &tx_ring->desc,
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BUS_DMA_NOWAIT | BUS_DMA_ZERO, &tx_ring->desc_map);
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if (error != 0) {
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device_printf(sc->sc_dev, "can't map tx ring DMA memory\n");
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goto fail;
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}
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error = bus_dmamap_load(tx_ring->desc_dmat, tx_ring->desc_map,
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tx_ring->desc, size, rtwn_pci_dma_map_addr, &tx_ring->paddr,
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BUS_DMA_NOWAIT);
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if (error != 0) {
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device_printf(sc->sc_dev, "could not load desc DMA map\n");
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goto fail;
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}
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bus_dmamap_sync(tx_ring->desc_dmat, tx_ring->desc_map,
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BUS_DMASYNC_PREWRITE);
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error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
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BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
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MJUMPAGESIZE, 1, MJUMPAGESIZE, 0, NULL, NULL, &tx_ring->data_dmat);
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if (error != 0) {
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device_printf(sc->sc_dev, "could not create tx buf DMA tag\n");
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goto fail;
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}
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for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) {
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struct rtwn_tx_data *tx_data = &tx_ring->tx_data[i];
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void *tx_desc = (uint8_t *)tx_ring->desc + sc->txdesc_len * i;
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uint32_t next_desc_addr = tx_ring->paddr +
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sc->txdesc_len * ((i + 1) % RTWN_PCI_TX_LIST_COUNT);
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rtwn_pci_setup_tx_desc(pc, tx_desc, next_desc_addr);
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error = bus_dmamap_create(tx_ring->data_dmat, 0, &tx_data->map);
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if (error != 0) {
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device_printf(sc->sc_dev,
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"could not create tx buf DMA map\n");
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return (error);
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}
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tx_data->m = NULL;
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tx_data->ni = NULL;
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}
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return (0);
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fail:
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rtwn_pci_free_tx_list(sc, qid);
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return (error);
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}
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static void
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rtwn_pci_reset_tx_ring_stopped(struct rtwn_softc *sc, int qid)
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{
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struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
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struct rtwn_tx_ring *ring = &pc->tx_ring[qid];
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int i;
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for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) {
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struct rtwn_tx_data *data = &ring->tx_data[i];
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void *desc = (uint8_t *)ring->desc + sc->txdesc_len * i;
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rtwn_pci_copy_tx_desc(pc, desc, NULL);
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if (data->m != NULL) {
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bus_dmamap_sync(ring->data_dmat, data->map,
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(ring->data_dmat, data->map);
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m_freem(data->m);
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data->m = NULL;
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}
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if (data->ni != NULL) {
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ieee80211_free_node(data->ni);
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data->ni = NULL;
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}
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}
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bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
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BUS_DMASYNC_POSTWRITE);
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sc->qfullmsk &= ~(1 << qid);
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ring->queued = 0;
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ring->last = ring->cur = 0;
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}
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/*
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* Clear entry 0 (or 1) in the beacon queue (other are not used).
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*/
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static void
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rtwn_pci_reset_beacon_ring(struct rtwn_softc *sc, int id)
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{
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struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
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struct rtwn_tx_ring *ring = &pc->tx_ring[RTWN_PCI_BEACON_QUEUE];
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struct rtwn_tx_data *data = &ring->tx_data[id];
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struct rtwn_tx_desc_common *txd = (struct rtwn_tx_desc_common *)
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((uint8_t *)ring->desc + id * sc->txdesc_len);
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bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_POSTREAD);
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if (txd->flags0 & RTWN_FLAGS0_OWN) {
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/* Clear OWN bit. */
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txd->flags0 &= ~RTWN_FLAGS0_OWN;
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bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
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BUS_DMASYNC_PREWRITE);
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/* Unload mbuf. */
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bus_dmamap_sync(ring->data_dmat, data->map,
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(ring->data_dmat, data->map);
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}
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}
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/*
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* Drop stale entries from Tx ring before the vap will be deleted.
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* In case if vap is NULL just free everything and reset cur / last pointers.
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*/
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static void
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rtwn_pci_reset_tx_list(struct rtwn_softc *sc, struct ieee80211vap *vap,
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int qid)
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{
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int i;
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if (vap == NULL) {
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if (qid != RTWN_PCI_BEACON_QUEUE) {
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/*
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* Device was stopped; just clear all entries.
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*/
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rtwn_pci_reset_tx_ring_stopped(sc, qid);
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} else {
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for (i = 0; i < RTWN_PORT_COUNT; i++)
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rtwn_pci_reset_beacon_ring(sc, i);
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}
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} else if (qid == RTWN_PCI_BEACON_QUEUE &&
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(vap->iv_opmode == IEEE80211_M_HOSTAP ||
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vap->iv_opmode == IEEE80211_M_IBSS)) {
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struct rtwn_vap *uvp = RTWN_VAP(vap);
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rtwn_pci_reset_beacon_ring(sc, uvp->id);
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} else {
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struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
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struct rtwn_tx_ring *ring = &pc->tx_ring[qid];
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for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) {
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struct rtwn_tx_data *data = &ring->tx_data[i];
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if (data->ni != NULL && data->ni->ni_vap == vap) {
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/*
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* NB: if some vap is still running
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* rtwn_pci_tx_done() will free the mbuf;
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* otherwise, rtwn_stop() will reset all rings
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* after device shutdown.
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*/
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ieee80211_free_node(data->ni);
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data->ni = NULL;
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}
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}
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}
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}
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static void
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rtwn_pci_free_tx_list(struct rtwn_softc *sc, int qid)
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{
|
|
struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
|
|
struct rtwn_tx_ring *tx_ring = &pc->tx_ring[qid];
|
|
struct rtwn_tx_data *tx_data;
|
|
int i;
|
|
|
|
if (tx_ring->desc_dmat != NULL) {
|
|
if (tx_ring->desc != NULL) {
|
|
bus_dmamap_sync(tx_ring->desc_dmat,
|
|
tx_ring->desc_map, BUS_DMASYNC_POSTWRITE);
|
|
bus_dmamap_unload(tx_ring->desc_dmat,
|
|
tx_ring->desc_map);
|
|
bus_dmamem_free(tx_ring->desc_dmat, tx_ring->desc,
|
|
tx_ring->desc_map);
|
|
}
|
|
bus_dma_tag_destroy(tx_ring->desc_dmat);
|
|
}
|
|
|
|
for (i = 0; i < RTWN_PCI_TX_LIST_COUNT; i++) {
|
|
tx_data = &tx_ring->tx_data[i];
|
|
|
|
if (tx_data->m != NULL) {
|
|
bus_dmamap_sync(tx_ring->data_dmat, tx_data->map,
|
|
BUS_DMASYNC_POSTWRITE);
|
|
bus_dmamap_unload(tx_ring->data_dmat, tx_data->map);
|
|
m_freem(tx_data->m);
|
|
tx_data->m = NULL;
|
|
}
|
|
}
|
|
if (tx_ring->data_dmat != NULL) {
|
|
bus_dma_tag_destroy(tx_ring->data_dmat);
|
|
tx_ring->data_dmat = NULL;
|
|
}
|
|
|
|
sc->qfullmsk &= ~(1 << qid);
|
|
tx_ring->queued = 0;
|
|
tx_ring->last = tx_ring->cur = 0;
|
|
}
|
|
|
|
static void
|
|
rtwn_pci_reset_lists(struct rtwn_softc *sc, struct ieee80211vap *vap)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < RTWN_PCI_NTXQUEUES; i++)
|
|
rtwn_pci_reset_tx_list(sc, vap, i);
|
|
|
|
if (vap == NULL) {
|
|
sc->qfullmsk = 0;
|
|
rtwn_pci_reset_rx_list(sc);
|
|
}
|
|
}
|
|
|
|
static int
|
|
rtwn_pci_fw_write_block(struct rtwn_softc *sc, const uint8_t *buf,
|
|
uint16_t reg, int mlen)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < mlen; i++)
|
|
rtwn_pci_write_1(sc, reg++, buf[i]);
|
|
|
|
/* NB: cannot fail */
|
|
return (0);
|
|
}
|
|
|
|
static uint16_t
|
|
rtwn_pci_get_qmap(struct rtwn_softc *sc)
|
|
{
|
|
struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
|
|
|
|
KASSERT(pc->pc_qmap != 0, ("%s: qmap is not set!\n", __func__));
|
|
|
|
return (pc->pc_qmap);
|
|
}
|
|
|
|
static void
|
|
rtwn_pci_set_desc_addr(struct rtwn_softc *sc)
|
|
{
|
|
struct rtwn_pci_softc *pc = RTWN_PCI_SOFTC(sc);
|
|
|
|
RTWN_DPRINTF(sc, RTWN_DEBUG_RESET, "%s: addresses:\n"
|
|
"bk: %08jX, be: %08jX, vi: %08jX, vo: %08jX\n"
|
|
"bcn: %08jX, mgt: %08jX, high: %08jX, rx: %08jX\n",
|
|
__func__, (uintmax_t)pc->tx_ring[RTWN_PCI_BK_QUEUE].paddr,
|
|
(uintmax_t)pc->tx_ring[RTWN_PCI_BE_QUEUE].paddr,
|
|
(uintmax_t)pc->tx_ring[RTWN_PCI_VI_QUEUE].paddr,
|
|
(uintmax_t)pc->tx_ring[RTWN_PCI_VO_QUEUE].paddr,
|
|
(uintmax_t)pc->tx_ring[RTWN_PCI_BEACON_QUEUE].paddr,
|
|
(uintmax_t)pc->tx_ring[RTWN_PCI_MGNT_QUEUE].paddr,
|
|
(uintmax_t)pc->tx_ring[RTWN_PCI_HIGH_QUEUE].paddr,
|
|
(uintmax_t)pc->rx_ring.paddr);
|
|
|
|
/* Set Tx Configuration Register. */
|
|
rtwn_pci_write_4(sc, R92C_TCR, pc->tcr);
|
|
|
|
/* Configure Tx DMA. */
|
|
rtwn_pci_write_4(sc, R92C_BKQ_DESA,
|
|
pc->tx_ring[RTWN_PCI_BK_QUEUE].paddr);
|
|
rtwn_pci_write_4(sc, R92C_BEQ_DESA,
|
|
pc->tx_ring[RTWN_PCI_BE_QUEUE].paddr);
|
|
rtwn_pci_write_4(sc, R92C_VIQ_DESA,
|
|
pc->tx_ring[RTWN_PCI_VI_QUEUE].paddr);
|
|
rtwn_pci_write_4(sc, R92C_VOQ_DESA,
|
|
pc->tx_ring[RTWN_PCI_VO_QUEUE].paddr);
|
|
rtwn_pci_write_4(sc, R92C_BCNQ_DESA,
|
|
pc->tx_ring[RTWN_PCI_BEACON_QUEUE].paddr);
|
|
rtwn_pci_write_4(sc, R92C_MGQ_DESA,
|
|
pc->tx_ring[RTWN_PCI_MGNT_QUEUE].paddr);
|
|
rtwn_pci_write_4(sc, R92C_HQ_DESA,
|
|
pc->tx_ring[RTWN_PCI_HIGH_QUEUE].paddr);
|
|
|
|
/* Configure Rx DMA. */
|
|
rtwn_pci_write_4(sc, R92C_RX_DESA, pc->rx_ring.paddr);
|
|
}
|
|
|
|
static void
|
|
rtwn_pci_beacon_update_begin(struct rtwn_softc *sc, struct ieee80211vap *vap)
|
|
{
|
|
struct rtwn_vap *rvp = RTWN_VAP(vap);
|
|
|
|
RTWN_ASSERT_LOCKED(sc);
|
|
|
|
rtwn_beacon_enable(sc, rvp->id, 0);
|
|
}
|
|
|
|
static void
|
|
rtwn_pci_beacon_update_end(struct rtwn_softc *sc, struct ieee80211vap *vap)
|
|
{
|
|
struct rtwn_vap *rvp = RTWN_VAP(vap);
|
|
|
|
RTWN_ASSERT_LOCKED(sc);
|
|
|
|
if (rvp->curr_mode != R92C_MSR_NOLINK)
|
|
rtwn_beacon_enable(sc, rvp->id, 1);
|
|
}
|
|
|
|
static void
|
|
rtwn_pci_attach_methods(struct rtwn_softc *sc)
|
|
{
|
|
sc->sc_write_1 = rtwn_pci_write_1;
|
|
sc->sc_write_2 = rtwn_pci_write_2;
|
|
sc->sc_write_4 = rtwn_pci_write_4;
|
|
sc->sc_read_1 = rtwn_pci_read_1;
|
|
sc->sc_read_2 = rtwn_pci_read_2;
|
|
sc->sc_read_4 = rtwn_pci_read_4;
|
|
sc->sc_delay = rtwn_pci_delay;
|
|
sc->sc_tx_start = rtwn_pci_tx_start;
|
|
sc->sc_reset_lists = rtwn_pci_reset_lists;
|
|
sc->sc_abort_xfers = rtwn_nop_softc;
|
|
sc->sc_fw_write_block = rtwn_pci_fw_write_block;
|
|
sc->sc_get_qmap = rtwn_pci_get_qmap;
|
|
sc->sc_set_desc_addr = rtwn_pci_set_desc_addr;
|
|
sc->sc_drop_incorrect_tx = rtwn_nop_softc;
|
|
sc->sc_beacon_update_begin = rtwn_pci_beacon_update_begin;
|
|
sc->sc_beacon_update_end = rtwn_pci_beacon_update_end;
|
|
sc->sc_beacon_unload = rtwn_pci_reset_beacon_ring;
|
|
|
|
sc->bcn_check_interval = 25000;
|
|
}
|
|
|
|
static int
|
|
rtwn_pci_attach(device_t dev)
|
|
{
|
|
const struct rtwn_pci_ident *ident;
|
|
struct rtwn_pci_softc *pc = device_get_softc(dev);
|
|
struct rtwn_softc *sc = &pc->pc_sc;
|
|
struct ieee80211com *ic = &sc->sc_ic;
|
|
uint32_t lcsr;
|
|
int cap_off, i, error, rid;
|
|
|
|
ident = rtwn_pci_probe_sub(dev);
|
|
if (ident == NULL)
|
|
return (ENXIO);
|
|
|
|
/*
|
|
* Get the offset of the PCI Express Capability Structure in PCI
|
|
* Configuration Space.
|
|
*/
|
|
error = pci_find_cap(dev, PCIY_EXPRESS, &cap_off);
|
|
if (error != 0) {
|
|
device_printf(dev, "PCIe capability structure not found!\n");
|
|
return (error);
|
|
}
|
|
|
|
/* Enable bus-mastering. */
|
|
pci_enable_busmaster(dev);
|
|
|
|
rid = PCIR_BAR(2);
|
|
pc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
|
RF_ACTIVE);
|
|
if (pc->mem == NULL) {
|
|
device_printf(dev, "can't map mem space\n");
|
|
return (ENOMEM);
|
|
}
|
|
pc->pc_st = rman_get_bustag(pc->mem);
|
|
pc->pc_sh = rman_get_bushandle(pc->mem);
|
|
|
|
/* Install interrupt handler. */
|
|
rid = 1;
|
|
if (pci_alloc_msi(dev, &rid) == 0)
|
|
rid = 1;
|
|
else
|
|
rid = 0;
|
|
pc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE |
|
|
(rid != 0 ? 0 : RF_SHAREABLE));
|
|
if (pc->irq == NULL) {
|
|
device_printf(dev, "can't map interrupt\n");
|
|
goto detach;
|
|
}
|
|
|
|
/* Disable PCIe Active State Power Management (ASPM). */
|
|
lcsr = pci_read_config(dev, cap_off + PCIER_LINK_CTL, 4);
|
|
lcsr &= ~PCIEM_LINK_CTL_ASPMC;
|
|
pci_write_config(dev, cap_off + PCIER_LINK_CTL, lcsr, 4);
|
|
|
|
sc->sc_dev = dev;
|
|
ic->ic_name = device_get_nameunit(dev);
|
|
|
|
/* Need to be initialized early. */
|
|
rtwn_sysctlattach(sc);
|
|
mtx_init(&sc->sc_mtx, ic->ic_name, MTX_NETWORK_LOCK, MTX_DEF);
|
|
|
|
rtwn_pci_attach_methods(sc);
|
|
rtwn_pci_attach_private(pc, ident->chip);
|
|
|
|
/* Allocate Tx/Rx buffers. */
|
|
error = rtwn_pci_alloc_rx_list(sc);
|
|
if (error != 0) {
|
|
device_printf(dev,
|
|
"could not allocate Rx buffers, error %d\n",
|
|
error);
|
|
goto detach;
|
|
}
|
|
for (i = 0; i < RTWN_PCI_NTXQUEUES; i++) {
|
|
error = rtwn_pci_alloc_tx_list(sc, i);
|
|
if (error != 0) {
|
|
device_printf(dev,
|
|
"could not allocate Tx buffers, error %d\n",
|
|
error);
|
|
goto detach;
|
|
}
|
|
}
|
|
|
|
/* Generic attach. */
|
|
error = rtwn_attach(sc);
|
|
if (error != 0)
|
|
goto detach;
|
|
|
|
/*
|
|
* Hook our interrupt after all initialization is complete.
|
|
*/
|
|
error = bus_setup_intr(dev, pc->irq, INTR_TYPE_NET | INTR_MPSAFE,
|
|
NULL, rtwn_pci_intr, sc, &pc->pc_ih);
|
|
if (error != 0) {
|
|
device_printf(dev, "can't establish interrupt, error %d\n",
|
|
error);
|
|
goto detach;
|
|
}
|
|
|
|
return (0);
|
|
|
|
detach:
|
|
rtwn_pci_detach(dev); /* failure */
|
|
return (ENXIO);
|
|
}
|
|
|
|
static int
|
|
rtwn_pci_detach(device_t dev)
|
|
{
|
|
struct rtwn_pci_softc *pc = device_get_softc(dev);
|
|
struct rtwn_softc *sc = &pc->pc_sc;
|
|
int i;
|
|
|
|
/* Generic detach. */
|
|
rtwn_detach(sc);
|
|
|
|
/* Uninstall interrupt handler. */
|
|
if (pc->irq != NULL) {
|
|
bus_teardown_intr(dev, pc->irq, pc->pc_ih);
|
|
bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(pc->irq),
|
|
pc->irq);
|
|
pci_release_msi(dev);
|
|
}
|
|
|
|
/* Free Tx/Rx buffers. */
|
|
for (i = 0; i < RTWN_PCI_NTXQUEUES; i++)
|
|
rtwn_pci_free_tx_list(sc, i);
|
|
rtwn_pci_free_rx_list(sc);
|
|
|
|
if (pc->mem != NULL)
|
|
bus_release_resource(dev, SYS_RES_MEMORY,
|
|
rman_get_rid(pc->mem), pc->mem);
|
|
|
|
rtwn_detach_private(sc);
|
|
mtx_destroy(&sc->sc_mtx);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
rtwn_pci_shutdown(device_t self)
|
|
{
|
|
struct rtwn_pci_softc *pc = device_get_softc(self);
|
|
|
|
ieee80211_stop_all(&pc->pc_sc.sc_ic);
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
rtwn_pci_suspend(device_t self)
|
|
{
|
|
struct rtwn_pci_softc *pc = device_get_softc(self);
|
|
|
|
rtwn_suspend(&pc->pc_sc);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
rtwn_pci_resume(device_t self)
|
|
{
|
|
struct rtwn_pci_softc *pc = device_get_softc(self);
|
|
|
|
rtwn_resume(&pc->pc_sc);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static device_method_t rtwn_pci_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, rtwn_pci_probe),
|
|
DEVMETHOD(device_attach, rtwn_pci_attach),
|
|
DEVMETHOD(device_detach, rtwn_pci_detach),
|
|
DEVMETHOD(device_shutdown, rtwn_pci_shutdown),
|
|
DEVMETHOD(device_suspend, rtwn_pci_suspend),
|
|
DEVMETHOD(device_resume, rtwn_pci_resume),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static driver_t rtwn_pci_driver = {
|
|
"rtwn",
|
|
rtwn_pci_methods,
|
|
sizeof(struct rtwn_pci_softc)
|
|
};
|
|
|
|
static devclass_t rtwn_pci_devclass;
|
|
|
|
DRIVER_MODULE(rtwn_pci, pci, rtwn_pci_driver, rtwn_pci_devclass, NULL, NULL);
|
|
MODULE_VERSION(rtwn_pci, 1);
|
|
MODULE_DEPEND(rtwn_pci, pci, 1, 1, 1);
|
|
MODULE_DEPEND(rtwn_pci, wlan, 1, 1, 1);
|
|
MODULE_DEPEND(rtwn_pci, rtwn, 2, 2, 2);
|