579 lines
14 KiB
C
579 lines
14 KiB
C
/*-
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* Copyright (c) 2005 Ruslan Ermilov
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/smbus/smbconf.h>
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#include "smbus_if.h"
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#define AMDSMB_DEBUG(x) if (amdsmb_debug) (x)
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#ifdef DEBUG
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static int amdsmb_debug = 1;
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#else
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static int amdsmb_debug = 0;
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#endif
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#define AMDSMB_VENDORID_AMD 0x1022
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#define AMDSMB_DEVICEID_AMD8111_SMB2 0x746a
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/*
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* ACPI 3.0, Chapter 12, Embedded Controller Interface.
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*/
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#define EC_DATA 0x00 /* data register */
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#define EC_SC 0x04 /* status of controller */
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#define EC_CMD 0x04 /* command register */
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#define EC_SC_IBF 0x02 /* data ready for embedded controller */
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#define EC_SC_OBF 0x01 /* data ready for host */
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#define EC_CMD_WR 0x81 /* write EC */
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#define EC_CMD_RD 0x80 /* read EC */
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/*
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* ACPI 3.0, Chapter 12, SMBus Host Controller Interface.
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*/
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#define SMB_PRTCL 0x00 /* protocol */
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#define SMB_STS 0x01 /* status */
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#define SMB_ADDR 0x02 /* address */
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#define SMB_CMD 0x03 /* command */
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#define SMB_DATA 0x04 /* 32 data registers */
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#define SMB_BCNT 0x24 /* number of data bytes */
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#define SMB_ALRM_A 0x25 /* alarm address */
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#define SMB_ALRM_D 0x26 /* 2 bytes alarm data */
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#define SMB_STS_DONE 0x80
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#define SMB_STS_ALRM 0x40
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#define SMB_STS_RES 0x20
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#define SMB_STS_STATUS 0x1f
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#define SMB_STS_OK 0x00 /* OK */
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#define SMB_STS_UF 0x07 /* Unknown Failure */
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#define SMB_STS_DANA 0x10 /* Device Address Not Acknowledged */
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#define SMB_STS_DED 0x11 /* Device Error Detected */
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#define SMB_STS_DCAD 0x12 /* Device Command Access Denied */
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#define SMB_STS_UE 0x13 /* Unknown Error */
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#define SMB_STS_DAD 0x17 /* Device Access Denied */
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#define SMB_STS_T 0x18 /* Timeout */
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#define SMB_STS_HUP 0x19 /* Host Unsupported Protocol */
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#define SMB_STS_B 0x1a /* Busy */
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#define SMB_STS_PEC 0x1f /* PEC (CRC-8) Error */
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#define SMB_PRTCL_WRITE 0x00
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#define SMB_PRTCL_READ 0x01
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#define SMB_PRTCL_QUICK 0x02
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#define SMB_PRTCL_BYTE 0x04
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#define SMB_PRTCL_BYTE_DATA 0x06
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#define SMB_PRTCL_WORD_DATA 0x08
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#define SMB_PRTCL_BLOCK_DATA 0x0a
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#define SMB_PRTCL_PROC_CALL 0x0c
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#define SMB_PRTCL_BLOCK_PROC_CALL 0x0d
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#define SMB_PRTCL_PEC 0x80
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struct amdsmb_softc {
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int rid;
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struct resource *res;
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device_t smbus;
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struct mtx lock;
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};
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#define AMDSMB_LOCK(amdsmb) mtx_lock(&(amdsmb)->lock)
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#define AMDSMB_UNLOCK(amdsmb) mtx_unlock(&(amdsmb)->lock)
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#define AMDSMB_LOCK_ASSERT(amdsmb) mtx_assert(&(amdsmb)->lock, MA_OWNED)
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#define AMDSMB_ECINB(amdsmb, register) \
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(bus_read_1(amdsmb->res, register))
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#define AMDSMB_ECOUTB(amdsmb, register, value) \
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(bus_write_1(amdsmb->res, register, value))
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static int amdsmb_detach(device_t dev);
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struct pci_device_table amdsmb_devs[] = {
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{ PCI_DEV(AMDSMB_VENDORID_AMD, AMDSMB_DEVICEID_AMD8111_SMB2),
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PCI_DESCR("AMD-8111 SMBus 2.0 Controller") }
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};
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static int
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amdsmb_probe(device_t dev)
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{
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const struct pci_device_table *tbl;
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tbl = PCI_MATCH(dev, amdsmb_devs);
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if (tbl == NULL)
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return (ENXIO);
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device_set_desc(dev, tbl->descr);
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return (BUS_PROBE_DEFAULT);
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}
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static int
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amdsmb_attach(device_t dev)
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{
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struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
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/* Allocate I/O space */
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amdsmb_sc->rid = PCIR_BAR(0);
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amdsmb_sc->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
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&amdsmb_sc->rid, RF_ACTIVE);
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if (amdsmb_sc->res == NULL) {
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device_printf(dev, "could not map i/o space\n");
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return (ENXIO);
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}
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mtx_init(&amdsmb_sc->lock, device_get_nameunit(dev), "amdsmb", MTX_DEF);
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/* Allocate a new smbus device */
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amdsmb_sc->smbus = device_add_child(dev, "smbus", -1);
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if (!amdsmb_sc->smbus) {
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amdsmb_detach(dev);
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return (EINVAL);
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}
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bus_generic_attach(dev);
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return (0);
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}
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static int
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amdsmb_detach(device_t dev)
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{
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struct amdsmb_softc *amdsmb_sc = device_get_softc(dev);
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if (amdsmb_sc->smbus) {
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device_delete_child(dev, amdsmb_sc->smbus);
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amdsmb_sc->smbus = NULL;
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}
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mtx_destroy(&amdsmb_sc->lock);
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if (amdsmb_sc->res)
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bus_release_resource(dev, SYS_RES_IOPORT, amdsmb_sc->rid,
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amdsmb_sc->res);
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return (0);
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}
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static int
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amdsmb_callback(device_t dev, int index, void *data)
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{
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int error = 0;
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switch (index) {
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case SMB_REQUEST_BUS:
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case SMB_RELEASE_BUS:
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break;
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default:
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error = EINVAL;
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}
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return (error);
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}
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static int
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amdsmb_ec_wait_write(struct amdsmb_softc *sc)
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{
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int timeout = 500;
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while (timeout-- && AMDSMB_ECINB(sc, EC_SC) & EC_SC_IBF)
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DELAY(1);
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if (timeout == 0) {
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device_printf(sc->smbus, "timeout waiting for IBF to clear\n");
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return (1);
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}
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return (0);
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}
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static int
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amdsmb_ec_wait_read(struct amdsmb_softc *sc)
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{
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int timeout = 500;
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while (timeout-- && ~AMDSMB_ECINB(sc, EC_SC) & EC_SC_OBF)
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DELAY(1);
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if (timeout == 0) {
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device_printf(sc->smbus, "timeout waiting for OBF to set\n");
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return (1);
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}
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return (0);
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}
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static int
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amdsmb_ec_read(struct amdsmb_softc *sc, u_char addr, u_char *data)
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{
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AMDSMB_LOCK_ASSERT(sc);
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if (amdsmb_ec_wait_write(sc))
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return (1);
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AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_RD);
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if (amdsmb_ec_wait_write(sc))
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return (1);
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AMDSMB_ECOUTB(sc, EC_DATA, addr);
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if (amdsmb_ec_wait_read(sc))
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return (1);
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*data = AMDSMB_ECINB(sc, EC_DATA);
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return (0);
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}
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static int
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amdsmb_ec_write(struct amdsmb_softc *sc, u_char addr, u_char data)
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{
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AMDSMB_LOCK_ASSERT(sc);
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if (amdsmb_ec_wait_write(sc))
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return (1);
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AMDSMB_ECOUTB(sc, EC_CMD, EC_CMD_WR);
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if (amdsmb_ec_wait_write(sc))
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return (1);
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AMDSMB_ECOUTB(sc, EC_DATA, addr);
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if (amdsmb_ec_wait_write(sc))
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return (1);
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AMDSMB_ECOUTB(sc, EC_DATA, data);
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return (0);
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}
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static int
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amdsmb_wait(struct amdsmb_softc *sc)
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{
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u_char sts, temp;
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int error, count;
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AMDSMB_LOCK_ASSERT(sc);
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amdsmb_ec_read(sc, SMB_PRTCL, &temp);
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if (temp != 0)
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{
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count = 10000;
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do {
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DELAY(500);
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amdsmb_ec_read(sc, SMB_PRTCL, &temp);
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} while (temp != 0 && count--);
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if (count == 0)
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return (SMB_ETIMEOUT);
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}
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amdsmb_ec_read(sc, SMB_STS, &sts);
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sts &= SMB_STS_STATUS;
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AMDSMB_DEBUG(printf("amdsmb: STS=0x%x\n", sts));
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switch (sts) {
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case SMB_STS_OK:
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error = SMB_ENOERR;
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break;
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case SMB_STS_DANA:
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error = SMB_ENOACK;
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break;
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case SMB_STS_B:
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error = SMB_EBUSY;
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break;
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case SMB_STS_T:
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error = SMB_ETIMEOUT;
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break;
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case SMB_STS_DCAD:
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case SMB_STS_DAD:
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case SMB_STS_HUP:
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error = SMB_ENOTSUPP;
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break;
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default:
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error = SMB_EBUSERR;
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break;
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}
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return (error);
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}
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static int
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amdsmb_quick(device_t dev, u_char slave, int how)
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{
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struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
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u_char protocol;
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int error;
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protocol = SMB_PRTCL_QUICK;
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switch (how) {
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case SMB_QWRITE:
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protocol |= SMB_PRTCL_WRITE;
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AMDSMB_DEBUG(printf("amdsmb: QWRITE to 0x%x", slave));
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break;
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case SMB_QREAD:
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protocol |= SMB_PRTCL_READ;
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AMDSMB_DEBUG(printf("amdsmb: QREAD to 0x%x", slave));
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break;
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default:
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panic("%s: unknown QUICK command (%x)!", __func__, how);
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}
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AMDSMB_LOCK(sc);
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amdsmb_ec_write(sc, SMB_ADDR, slave);
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amdsmb_ec_write(sc, SMB_PRTCL, protocol);
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error = amdsmb_wait(sc);
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AMDSMB_DEBUG(printf(", error=0x%x\n", error));
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AMDSMB_UNLOCK(sc);
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return (error);
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}
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static int
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amdsmb_sendb(device_t dev, u_char slave, char byte)
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{
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struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
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int error;
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AMDSMB_LOCK(sc);
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amdsmb_ec_write(sc, SMB_CMD, byte);
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amdsmb_ec_write(sc, SMB_ADDR, slave);
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amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE);
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error = amdsmb_wait(sc);
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AMDSMB_DEBUG(printf("amdsmb: SENDB to 0x%x, byte=0x%x, error=0x%x\n",
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slave, byte, error));
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AMDSMB_UNLOCK(sc);
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return (error);
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}
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static int
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amdsmb_recvb(device_t dev, u_char slave, char *byte)
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{
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struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
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int error;
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AMDSMB_LOCK(sc);
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amdsmb_ec_write(sc, SMB_ADDR, slave);
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amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE);
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if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
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amdsmb_ec_read(sc, SMB_DATA, byte);
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AMDSMB_DEBUG(printf("amdsmb: RECVB from 0x%x, byte=0x%x, error=0x%x\n",
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slave, *byte, error));
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AMDSMB_UNLOCK(sc);
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return (error);
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}
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static int
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amdsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
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{
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struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
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int error;
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AMDSMB_LOCK(sc);
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amdsmb_ec_write(sc, SMB_CMD, cmd);
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amdsmb_ec_write(sc, SMB_DATA, byte);
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amdsmb_ec_write(sc, SMB_ADDR, slave);
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amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BYTE_DATA);
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error = amdsmb_wait(sc);
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AMDSMB_DEBUG(printf("amdsmb: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, "
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"error=0x%x\n", slave, cmd, byte, error));
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AMDSMB_UNLOCK(sc);
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return (error);
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}
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static int
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amdsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
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{
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struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
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int error;
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AMDSMB_LOCK(sc);
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amdsmb_ec_write(sc, SMB_CMD, cmd);
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amdsmb_ec_write(sc, SMB_ADDR, slave);
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amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BYTE_DATA);
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if ((error = amdsmb_wait(sc)) == SMB_ENOERR)
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amdsmb_ec_read(sc, SMB_DATA, byte);
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AMDSMB_DEBUG(printf("amdsmb: READB from 0x%x, cmd=0x%x, byte=0x%x, "
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"error=0x%x\n", slave, cmd, (unsigned char)*byte, error));
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AMDSMB_UNLOCK(sc);
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return (error);
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}
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static int
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amdsmb_writew(device_t dev, u_char slave, char cmd, short word)
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{
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struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
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int error;
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AMDSMB_LOCK(sc);
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amdsmb_ec_write(sc, SMB_CMD, cmd);
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amdsmb_ec_write(sc, SMB_DATA, word);
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amdsmb_ec_write(sc, SMB_DATA + 1, word >> 8);
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amdsmb_ec_write(sc, SMB_ADDR, slave);
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amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_WORD_DATA);
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error = amdsmb_wait(sc);
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AMDSMB_DEBUG(printf("amdsmb: WRITEW to 0x%x, cmd=0x%x, word=0x%x, "
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"error=0x%x\n", slave, cmd, word, error));
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AMDSMB_UNLOCK(sc);
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return (error);
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}
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static int
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amdsmb_readw(device_t dev, u_char slave, char cmd, short *word)
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{
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struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
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u_char temp[2];
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int error;
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AMDSMB_LOCK(sc);
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amdsmb_ec_write(sc, SMB_CMD, cmd);
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amdsmb_ec_write(sc, SMB_ADDR, slave);
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amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_WORD_DATA);
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if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
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amdsmb_ec_read(sc, SMB_DATA + 0, &temp[0]);
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amdsmb_ec_read(sc, SMB_DATA + 1, &temp[1]);
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*word = temp[0] | (temp[1] << 8);
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}
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AMDSMB_DEBUG(printf("amdsmb: READW from 0x%x, cmd=0x%x, word=0x%x, "
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"error=0x%x\n", slave, cmd, (unsigned short)*word, error));
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AMDSMB_UNLOCK(sc);
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return (error);
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}
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static int
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amdsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
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{
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struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
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u_char i;
|
|
int error;
|
|
|
|
if (count < 1 || count > 32)
|
|
return (SMB_EINVAL);
|
|
|
|
AMDSMB_LOCK(sc);
|
|
amdsmb_ec_write(sc, SMB_CMD, cmd);
|
|
amdsmb_ec_write(sc, SMB_BCNT, count);
|
|
for (i = 0; i < count; i++)
|
|
amdsmb_ec_write(sc, SMB_DATA + i, buf[i]);
|
|
amdsmb_ec_write(sc, SMB_ADDR, slave);
|
|
amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_WRITE | SMB_PRTCL_BLOCK_DATA);
|
|
|
|
error = amdsmb_wait(sc);
|
|
|
|
AMDSMB_DEBUG(printf("amdsmb: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, "
|
|
"error=0x%x", slave, count, cmd, error));
|
|
AMDSMB_UNLOCK(sc);
|
|
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
amdsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
|
|
{
|
|
struct amdsmb_softc *sc = (struct amdsmb_softc *)device_get_softc(dev);
|
|
u_char data, len, i;
|
|
int error;
|
|
|
|
if (*count < 1 || *count > 32)
|
|
return (SMB_EINVAL);
|
|
|
|
AMDSMB_LOCK(sc);
|
|
amdsmb_ec_write(sc, SMB_CMD, cmd);
|
|
amdsmb_ec_write(sc, SMB_ADDR, slave);
|
|
amdsmb_ec_write(sc, SMB_PRTCL, SMB_PRTCL_READ | SMB_PRTCL_BLOCK_DATA);
|
|
|
|
if ((error = amdsmb_wait(sc)) == SMB_ENOERR) {
|
|
amdsmb_ec_read(sc, SMB_BCNT, &len);
|
|
for (i = 0; i < len; i++) {
|
|
amdsmb_ec_read(sc, SMB_DATA + i, &data);
|
|
if (i < *count)
|
|
buf[i] = data;
|
|
}
|
|
*count = len;
|
|
}
|
|
|
|
AMDSMB_DEBUG(printf("amdsmb: READBLK to 0x%x, count=0x%x, cmd=0x%x, "
|
|
"error=0x%x", slave, *count, cmd, error));
|
|
AMDSMB_UNLOCK(sc);
|
|
|
|
return (error);
|
|
}
|
|
|
|
static device_method_t amdsmb_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, amdsmb_probe),
|
|
DEVMETHOD(device_attach, amdsmb_attach),
|
|
DEVMETHOD(device_detach, amdsmb_detach),
|
|
|
|
/* SMBus interface */
|
|
DEVMETHOD(smbus_callback, amdsmb_callback),
|
|
DEVMETHOD(smbus_quick, amdsmb_quick),
|
|
DEVMETHOD(smbus_sendb, amdsmb_sendb),
|
|
DEVMETHOD(smbus_recvb, amdsmb_recvb),
|
|
DEVMETHOD(smbus_writeb, amdsmb_writeb),
|
|
DEVMETHOD(smbus_readb, amdsmb_readb),
|
|
DEVMETHOD(smbus_writew, amdsmb_writew),
|
|
DEVMETHOD(smbus_readw, amdsmb_readw),
|
|
DEVMETHOD(smbus_bwrite, amdsmb_bwrite),
|
|
DEVMETHOD(smbus_bread, amdsmb_bread),
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t amdsmb_driver = {
|
|
"amdsmb",
|
|
amdsmb_methods,
|
|
sizeof(struct amdsmb_softc),
|
|
};
|
|
|
|
DRIVER_MODULE(amdsmb, pci, amdsmb_driver, 0, 0);
|
|
DRIVER_MODULE(smbus, amdsmb, smbus_driver, 0, 0);
|
|
|
|
MODULE_DEPEND(amdsmb, pci, 1, 1, 1);
|
|
MODULE_DEPEND(amdsmb, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
|
|
MODULE_VERSION(amdsmb, 1);
|