307 lines
8.0 KiB
C
307 lines
8.0 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright © 2021-2022 Bjoern A. Zeeb
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/endian.h>
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#include <sys/socket.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/fdt/simplebus.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "memac_mdio.h"
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#include "memac_mdio_if.h"
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#include "ofw_bus_if.h"
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#include "miibus_if.h"
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/* -------------------------------------------------------------------------- */
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struct memacphy_softc_fdt {
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struct memacphy_softc_common scc;
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uint32_t reg;
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phandle_t xref;
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};
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static void
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memacphy_fdt_miibus_statchg(device_t dev)
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{
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struct memacphy_softc_fdt *sc;
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sc = device_get_softc(dev);
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memacphy_miibus_statchg(&sc->scc);
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}
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static int
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memacphy_fdt_set_ni_dev(device_t dev, device_t nidev)
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{
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struct memacphy_softc_fdt *sc;
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sc = device_get_softc(dev);
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return (memacphy_set_ni_dev(&sc->scc, nidev));
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}
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static int
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memacphy_fdt_get_phy_loc(device_t dev, int *phy_loc)
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{
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struct memacphy_softc_fdt *sc;
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sc = device_get_softc(dev);
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return (memacphy_get_phy_loc(&sc->scc, phy_loc));
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}
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static int
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memacphy_fdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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device_set_desc(dev, "MEMAC PHY (fdt)");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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memacphy_fdt_attach(device_t dev)
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{
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struct memacphy_softc_fdt *sc;
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phandle_t node;
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ssize_t s;
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int error;
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sc = device_get_softc(dev);
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sc->scc.dev = dev;
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node = ofw_bus_get_node(dev);
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s = device_get_property(dev, "reg", &sc->reg, sizeof(sc->reg),
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DEVICE_PROP_UINT32);
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if (s != -1)
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sc->scc.phy = sc->reg;
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else
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sc->scc.phy = -1;
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sc->xref = OF_xref_from_node(node);
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error = OF_device_register_xref(sc->xref, dev);
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if (error != 0)
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device_printf(dev, "Failed to register xref %#x\n", sc->xref);
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if (bootverbose)
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device_printf(dev, "node %#x '%s': reg %#x xref %#x phy %u\n",
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node, ofw_bus_get_name(dev), sc->reg, sc->xref, sc->scc.phy);
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if (sc->scc.phy == -1)
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error = ENXIO;
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return (error);
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}
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static device_method_t memacphy_fdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, memacphy_fdt_probe),
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DEVMETHOD(device_attach, memacphy_fdt_attach),
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DEVMETHOD(device_detach, bus_generic_detach),
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/* MII interface */
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DEVMETHOD(miibus_readreg, memacphy_miibus_readreg),
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DEVMETHOD(miibus_writereg, memacphy_miibus_writereg),
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DEVMETHOD(miibus_statchg, memacphy_fdt_miibus_statchg),
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/* memac */
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DEVMETHOD(memac_mdio_set_ni_dev, memacphy_fdt_set_ni_dev),
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DEVMETHOD(memac_mdio_get_phy_loc, memacphy_fdt_get_phy_loc),
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DEVMETHOD_END
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};
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DEFINE_CLASS_0(memacphy_fdt, memacphy_fdt_driver, memacphy_fdt_methods,
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sizeof(struct memacphy_softc_fdt));
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EARLY_DRIVER_MODULE(memacphy_fdt, memac_mdio_fdt, memacphy_fdt_driver, 0, 0,
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BUS_PASS_SUPPORTDEV);
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DRIVER_MODULE(miibus, memacphy_fdt, miibus_driver, 0, 0);
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MODULE_DEPEND(memacphy_fdt, miibus, 1, 1, 1);
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/* -------------------------------------------------------------------------- */
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/*
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* Order in this softc is important; memac_mdio_fdt_attach() calls
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* simplebus_init() which expects sb_sc at the beginning.
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*/
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struct memac_mdio_softc_fdt {
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struct simplebus_softc sb_sc; /* Must stay first. */
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struct memac_mdio_softc_common scc;
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};
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static int
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memac_fdt_miibus_readreg(device_t dev, int phy, int reg)
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{
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struct memac_mdio_softc_fdt *sc;
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sc = device_get_softc(dev);
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return (memac_miibus_readreg(&sc->scc, phy, reg));
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}
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static int
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memac_fdt_miibus_writereg(device_t dev, int phy, int reg, int data)
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{
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struct memac_mdio_softc_fdt *sc;
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sc = device_get_softc(dev);
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return (memac_miibus_writereg(&sc->scc, phy, reg, data));
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}
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static struct ofw_compat_data compat_data[] = {
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{ "fsl,fman-memac-mdio", 1 },
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{ NULL, 0 }
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};
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static int
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memac_mdio_fdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
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return (ENXIO);
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device_set_desc(dev, "Freescale XGMAC MDIO Bus (FDT)");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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memac_mdio_fdt_probe_child(device_t bus, phandle_t child)
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{
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device_t childdev;
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/* Make sure we do not aliready have a device. */
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childdev = ofw_bus_find_child_device_by_phandle(bus, child);
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if (childdev != NULL)
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return (0);
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childdev = simplebus_add_device(bus, child, 0, NULL, -1, NULL);
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if (childdev == NULL)
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return (ENXIO);
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return (device_probe_and_attach(childdev));
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}
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static int
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memac_mdio_fdt_attach(device_t dev)
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{
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struct memac_mdio_softc_fdt *sc;
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phandle_t node, child;
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int error;
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sc = device_get_softc(dev);
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sc->scc.dev = dev;
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error = memac_mdio_generic_attach(&sc->scc);
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if (error != 0)
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return (error);
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/* Attach the *phy* children represented in the device tree. */
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bus_generic_probe(dev);
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bus_enumerate_hinted_children(dev);
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node = ofw_bus_get_node(dev);
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simplebus_init(dev, node);
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for (child = OF_child(node); child > 0; child = OF_peer(child)) {
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if (!OF_hasprop(child, "reg"))
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continue;
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if (memac_mdio_fdt_probe_child(dev, child) != 0)
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continue;
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}
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return (0);
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}
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static int
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memac_mdio_fdt_detach(device_t dev)
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{
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struct memac_mdio_softc_fdt *sc;
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sc = device_get_softc(dev);
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return (memac_mdio_generic_detach(&sc->scc));
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}
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static const struct ofw_bus_devinfo *
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memac_simplebus_get_devinfo(device_t bus, device_t child)
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{
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return (OFW_BUS_GET_DEVINFO(device_get_parent(bus), child));
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}
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static device_method_t memac_mdio_fdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, memac_mdio_fdt_probe),
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DEVMETHOD(device_attach, memac_mdio_fdt_attach),
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DEVMETHOD(device_detach, memac_mdio_fdt_detach),
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/* MII interface */
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DEVMETHOD(miibus_readreg, memac_fdt_miibus_readreg),
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DEVMETHOD(miibus_writereg, memac_fdt_miibus_writereg),
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/* OFW/simplebus */
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DEVMETHOD(ofw_bus_get_devinfo, memac_simplebus_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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/* Bus interface */
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DEVMETHOD(bus_add_child, bus_generic_add_child),
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DEVMETHOD(bus_read_ivar, memac_mdio_read_ivar),
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DEVMETHOD(bus_get_property, memac_mdio_get_property),
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DEVMETHOD_END
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};
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DEFINE_CLASS_0(memac_mdio_fdt, memac_mdio_fdt_driver, memac_mdio_fdt_methods,
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sizeof(struct memac_mdio_softc_fdt));
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EARLY_DRIVER_MODULE(memac_mdio_fdt, simplebus, memac_mdio_fdt_driver, 0, 0,
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BUS_PASS_SUPPORTDEV);
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DRIVER_MODULE(miibus, memac_mdio_fdt, miibus_driver, 0, 0);
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MODULE_DEPEND(memac_mdio_fdt, miibus, 1, 1, 1);
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MODULE_VERSION(memac_mdio_fdt, 1);
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