122 lines
4.1 KiB
C
122 lines
4.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/* Copyright (c) 2021, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _IAVF_ADMINQ_H_
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#define _IAVF_ADMINQ_H_
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#include "iavf_osdep.h"
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#include "iavf_status.h"
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#include "iavf_adminq_cmd.h"
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#define IAVF_ADMINQ_DESC(R, i) \
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(&(((struct iavf_aq_desc *)((R).desc_buf.va))[i]))
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#define IAVF_ADMINQ_DESC_ALIGNMENT 4096
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struct iavf_adminq_ring {
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struct iavf_virt_mem dma_head; /* space for dma structures */
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struct iavf_dma_mem desc_buf; /* descriptor ring memory */
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struct iavf_virt_mem cmd_buf; /* command buffer memory */
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union {
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struct iavf_dma_mem *asq_bi;
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struct iavf_dma_mem *arq_bi;
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} r;
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u16 count; /* Number of descriptors */
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u16 rx_buf_len; /* Admin Receive Queue buffer length */
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/* used for interrupt processing */
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u16 next_to_use;
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u16 next_to_clean;
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/* used for queue tracking */
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u32 head;
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u32 tail;
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u32 len;
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u32 bah;
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u32 bal;
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};
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/* ASQ transaction details */
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struct iavf_asq_cmd_details {
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void *callback; /* cast from type IAVF_ADMINQ_CALLBACK */
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u64 cookie;
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u16 flags_ena;
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u16 flags_dis;
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bool async;
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bool postpone;
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struct iavf_aq_desc *wb_desc;
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};
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#define IAVF_ADMINQ_DETAILS(R, i) \
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(&(((struct iavf_asq_cmd_details *)((R).cmd_buf.va))[i]))
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/* ARQ event information */
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struct iavf_arq_event_info {
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struct iavf_aq_desc desc;
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u16 msg_len;
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u16 buf_len;
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u8 *msg_buf;
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};
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/* Admin Queue information */
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struct iavf_adminq_info {
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struct iavf_adminq_ring arq; /* receive queue */
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struct iavf_adminq_ring asq; /* send queue */
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u32 asq_cmd_timeout; /* send queue cmd write back timeout*/
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u16 num_arq_entries; /* receive queue depth */
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u16 num_asq_entries; /* send queue depth */
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u16 arq_buf_size; /* receive queue buffer size */
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u16 asq_buf_size; /* send queue buffer size */
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u16 fw_maj_ver; /* firmware major version */
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u16 fw_min_ver; /* firmware minor version */
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u32 fw_build; /* firmware build number */
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u16 api_maj_ver; /* api major version */
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u16 api_min_ver; /* api minor version */
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struct iavf_spinlock asq_spinlock; /* Send queue spinlock */
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struct iavf_spinlock arq_spinlock; /* Receive queue spinlock */
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/* last status values on send and receive queues */
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enum iavf_admin_queue_err asq_last_status;
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enum iavf_admin_queue_err arq_last_status;
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};
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/* general information */
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#define IAVF_AQ_LARGE_BUF 512
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#define IAVF_ASQ_CMD_TIMEOUT 250000 /* usecs */
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void iavf_fill_default_direct_cmd_desc(struct iavf_aq_desc *desc,
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u16 opcode);
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#endif /* _IAVF_ADMINQ_H_ */
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