510 lines
11 KiB
C
510 lines
11 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/* Copyright (c) 2023, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ICE_FLEX_TYPE_H_
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#define _ICE_FLEX_TYPE_H_
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#define ICE_FV_OFFSET_INVAL 0x1FF
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#pragma pack(1)
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/* Extraction Sequence (Field Vector) Table */
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struct ice_fv_word {
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u8 prot_id;
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u16 off; /* Offset within the protocol header */
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u8 resvrd;
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};
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#pragma pack()
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#define ICE_MAX_NUM_PROFILES 256
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#define ICE_MAX_FV_WORDS 48
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struct ice_fv {
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struct ice_fv_word ew[ICE_MAX_FV_WORDS];
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};
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/* Packet Type (PTYPE) values */
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#define ICE_PTYPE_MAC_PAY 1
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#define ICE_PTYPE_IPV4FRAG_PAY 22
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#define ICE_PTYPE_IPV4_PAY 23
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#define ICE_PTYPE_IPV4_UDP_PAY 24
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#define ICE_PTYPE_IPV4_TCP_PAY 26
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#define ICE_PTYPE_IPV4_SCTP_PAY 27
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#define ICE_PTYPE_IPV4_ICMP_PAY 28
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#define ICE_PTYPE_IPV6FRAG_PAY 88
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#define ICE_PTYPE_IPV6_PAY 89
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#define ICE_PTYPE_IPV6_UDP_PAY 90
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#define ICE_PTYPE_IPV6_TCP_PAY 92
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#define ICE_PTYPE_IPV6_SCTP_PAY 93
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#define ICE_PTYPE_IPV6_ICMP_PAY 94
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struct ice_meta_sect {
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struct ice_pkg_ver ver;
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#define ICE_META_SECT_NAME_SIZE 28
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char name[ICE_META_SECT_NAME_SIZE];
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__le32 track_id;
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};
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/* Packet Type Groups (PTG) - Inner Most fields (IM) */
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#define ICE_PTG_IM_IPV4_TCP 16
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#define ICE_PTG_IM_IPV4_UDP 17
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#define ICE_PTG_IM_IPV4_SCTP 18
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#define ICE_PTG_IM_IPV4_PAY 20
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#define ICE_PTG_IM_IPV4_OTHER 21
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#define ICE_PTG_IM_IPV6_TCP 32
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#define ICE_PTG_IM_IPV6_UDP 33
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#define ICE_PTG_IM_IPV6_SCTP 34
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#define ICE_PTG_IM_IPV6_OTHER 37
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#define ICE_PTG_IM_L2_OTHER 67
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struct ice_flex_fields {
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union {
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struct {
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u8 src_ip;
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u8 dst_ip;
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u8 flow_label; /* valid for IPv6 only */
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} ip_fields;
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struct {
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u8 src_prt;
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u8 dst_prt;
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} tcp_udp_fields;
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struct {
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u8 src_ip;
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u8 dst_ip;
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u8 src_prt;
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u8 dst_prt;
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} ip_tcp_udp_fields;
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struct {
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u8 src_prt;
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u8 dst_prt;
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u8 flow_label; /* valid for IPv6 only */
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u8 spi;
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} ip_esp_fields;
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struct {
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u32 offset;
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u32 length;
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} off_len;
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} fields;
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};
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#define ICE_XLT1_DFLT_GRP 0
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#define ICE_XLT1_TABLE_SIZE 1024
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/* package labels */
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struct ice_label {
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__le16 value;
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#define ICE_PKG_LABEL_SIZE 64
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char name[ICE_PKG_LABEL_SIZE];
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};
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struct ice_label_section {
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__le16 count;
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struct ice_label label[STRUCT_HACK_VAR_LEN];
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};
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#define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
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ice_struct_size((struct ice_label_section *)0, label, 1) - \
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sizeof(struct ice_label), sizeof(struct ice_label))
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struct ice_sw_fv_section {
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__le16 count;
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__le16 base_offset;
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struct ice_fv fv[STRUCT_HACK_VAR_LEN];
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};
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struct ice_sw_fv_list_entry {
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struct LIST_ENTRY_TYPE list_entry;
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u32 profile_id;
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struct ice_fv *fv_ptr;
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};
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#pragma pack(1)
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/* The BOOST TCAM stores the match packet header in reverse order, meaning
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* the fields are reversed; in addition, this means that the normally big endian
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* fields of the packet are now little endian.
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*/
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struct ice_boost_key_value {
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#define ICE_BOOST_REMAINING_HV_KEY 15
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u8 remaining_hv_key[ICE_BOOST_REMAINING_HV_KEY];
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union {
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struct {
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__le16 hv_dst_port_key;
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__le16 hv_src_port_key;
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} /* udp_tunnel */;
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struct {
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__le16 hv_vlan_id_key;
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__le16 hv_etype_key;
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} vlan;
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};
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u8 tcam_search_key;
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};
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#pragma pack()
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struct ice_boost_key {
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struct ice_boost_key_value key;
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struct ice_boost_key_value key2;
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};
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/* package Boost TCAM entry */
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struct ice_boost_tcam_entry {
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__le16 addr;
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__le16 reserved;
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/* break up the 40 bytes of key into different fields */
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struct ice_boost_key key;
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u8 boost_hit_index_group;
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/* The following contains bitfields which are not on byte boundaries.
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* These fields are currently unused by driver software.
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*/
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#define ICE_BOOST_BIT_FIELDS 43
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u8 bit_fields[ICE_BOOST_BIT_FIELDS];
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};
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struct ice_boost_tcam_section {
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__le16 count;
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__le16 reserved;
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struct ice_boost_tcam_entry tcam[STRUCT_HACK_VAR_LEN];
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};
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#define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
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ice_struct_size((struct ice_boost_tcam_section *)0, tcam, 1) - \
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sizeof(struct ice_boost_tcam_entry), \
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sizeof(struct ice_boost_tcam_entry))
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struct ice_xlt1_section {
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__le16 count;
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__le16 offset;
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u8 value[STRUCT_HACK_VAR_LEN];
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};
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struct ice_xlt2_section {
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__le16 count;
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__le16 offset;
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__le16 value[STRUCT_HACK_VAR_LEN];
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};
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struct ice_prof_redir_section {
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__le16 count;
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__le16 offset;
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u8 redir_value[STRUCT_HACK_VAR_LEN];
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};
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/* Tunnel enabling */
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enum ice_tunnel_type {
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TNL_VXLAN = 0,
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TNL_GENEVE,
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TNL_GRETAP,
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TNL_GTP,
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TNL_GTPC,
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TNL_GTPU,
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TNL_LAST = 0xFF,
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TNL_ALL = 0xFF,
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};
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struct ice_tunnel_type_scan {
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enum ice_tunnel_type type;
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const char *label_prefix;
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};
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struct ice_tunnel_entry {
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enum ice_tunnel_type type;
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u16 boost_addr;
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u16 port;
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u16 ref;
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struct ice_boost_tcam_entry *boost_entry;
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u8 valid;
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u8 in_use;
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u8 marked;
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};
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#define ICE_TUNNEL_MAX_ENTRIES 16
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struct ice_tunnel_table {
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struct ice_tunnel_entry tbl[ICE_TUNNEL_MAX_ENTRIES];
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u16 count;
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};
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struct ice_pkg_es {
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__le16 count;
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__le16 offset;
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struct ice_fv_word es[STRUCT_HACK_VAR_LEN];
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};
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struct ice_es {
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u32 sid;
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u16 count;
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u16 fvw;
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u16 *ref_count;
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struct LIST_HEAD_TYPE prof_map;
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struct ice_fv_word *t;
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struct ice_lock prof_map_lock; /* protect access to profiles list */
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u8 *written;
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u8 reverse; /* set to true to reverse FV order */
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};
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/* PTYPE Group management */
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/* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type
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* group (PTG) ID as output.
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*
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* Note: PTG 0 is the default packet type group and it is assumed that all PTYPE
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* are a part of this group until moved to a new PTG.
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*/
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#define ICE_DEFAULT_PTG 0
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struct ice_ptg_entry {
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struct ice_ptg_ptype *first_ptype;
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u8 in_use;
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};
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struct ice_ptg_ptype {
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struct ice_ptg_ptype *next_ptype;
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u8 ptg;
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};
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#define ICE_MAX_TCAM_PER_PROFILE 32
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#define ICE_MAX_PTG_PER_PROFILE 32
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struct ice_prof_map {
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struct LIST_ENTRY_TYPE list;
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u64 profile_cookie;
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u64 context;
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u8 prof_id;
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u8 ptg_cnt;
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u8 ptg[ICE_MAX_PTG_PER_PROFILE];
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};
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#define ICE_INVALID_TCAM 0xFFFF
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struct ice_tcam_inf {
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u16 tcam_idx;
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u8 ptg;
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u8 prof_id;
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u8 in_use;
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};
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struct ice_vsig_prof {
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struct LIST_ENTRY_TYPE list;
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u64 profile_cookie;
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u8 prof_id;
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u8 tcam_count;
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struct ice_tcam_inf tcam[ICE_MAX_TCAM_PER_PROFILE];
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};
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struct ice_vsig_entry {
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struct LIST_HEAD_TYPE prop_lst;
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struct ice_vsig_vsi *first_vsi;
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u8 in_use;
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};
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struct ice_vsig_vsi {
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struct ice_vsig_vsi *next_vsi;
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u32 prop_mask;
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u16 changed;
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u16 vsig;
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};
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#define ICE_XLT1_CNT 1024
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#define ICE_MAX_PTGS 256
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/* XLT1 Table */
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struct ice_xlt1 {
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struct ice_ptg_entry *ptg_tbl;
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struct ice_ptg_ptype *ptypes;
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u8 *t;
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u32 sid;
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u16 count;
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};
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#define ICE_XLT2_CNT 768
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#define ICE_MAX_VSIGS 768
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/* VSIG bit layout:
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* [0:12]: incremental VSIG index 1 to ICE_MAX_VSIGS
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* [13:15]: PF number of device
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*/
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#define ICE_VSIG_IDX_M (0x1FFF)
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#define ICE_PF_NUM_S 13
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#define ICE_PF_NUM_M (0x07 << ICE_PF_NUM_S)
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#define ICE_VSIG_VALUE(vsig, pf_id) \
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((u16)((((u16)(vsig)) & ICE_VSIG_IDX_M) | \
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(((u16)(pf_id) << ICE_PF_NUM_S) & ICE_PF_NUM_M)))
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#define ICE_DEFAULT_VSIG 0
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/* XLT2 Table */
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struct ice_xlt2 {
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struct ice_vsig_entry *vsig_tbl;
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struct ice_vsig_vsi *vsis;
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u16 *t;
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u32 sid;
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u16 count;
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};
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/* Extraction sequence - list of match fields:
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* protocol ID, offset, profile length
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*/
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union ice_match_fld {
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struct {
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u8 prot_id;
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u8 offset;
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u8 length;
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u8 reserved; /* must be zero */
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} fld;
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u32 val;
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};
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#define ICE_MATCH_LIST_SZ 20
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#pragma pack(1)
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struct ice_match {
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u8 count;
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union ice_match_fld list[ICE_MATCH_LIST_SZ];
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};
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/* Profile ID Management */
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struct ice_prof_id_key {
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__le16 flags;
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u8 xlt1;
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__le16 xlt2_cdid;
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};
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/* Keys are made up of two values, each one-half the size of the key.
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* For TCAM, the entire key is 80 bits wide (or 2, 40-bit wide values)
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*/
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#define ICE_TCAM_KEY_VAL_SZ 5
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#define ICE_TCAM_KEY_SZ (2 * ICE_TCAM_KEY_VAL_SZ)
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struct ice_prof_tcam_entry {
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__le16 addr;
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u8 key[ICE_TCAM_KEY_SZ];
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u8 prof_id;
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};
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#pragma pack()
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struct ice_prof_id_section {
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__le16 count;
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struct ice_prof_tcam_entry entry[STRUCT_HACK_VAR_LEN];
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};
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struct ice_prof_tcam {
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u32 sid;
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u16 count;
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u16 max_prof_id;
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struct ice_prof_tcam_entry *t;
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u8 cdid_bits; /* # CDID bits to use in key, 0, 2, 4, or 8 */
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};
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struct ice_prof_redir {
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u8 *t;
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u32 sid;
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u16 count;
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};
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/* Tables per block */
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struct ice_blk_info {
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struct ice_xlt1 xlt1;
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struct ice_xlt2 xlt2;
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struct ice_prof_tcam prof;
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struct ice_prof_redir prof_redir;
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struct ice_es es;
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u8 overwrite; /* set to true to allow overwrite of table entries */
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u8 is_list_init;
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};
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enum ice_chg_type {
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ICE_TCAM_NONE = 0,
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ICE_PTG_ES_ADD,
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ICE_TCAM_ADD,
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ICE_VSIG_ADD,
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ICE_VSIG_REM,
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ICE_VSI_MOVE,
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};
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struct ice_chs_chg {
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struct LIST_ENTRY_TYPE list_entry;
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enum ice_chg_type type;
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u8 add_ptg;
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u8 add_vsig;
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u8 add_tcam_idx;
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u8 add_prof;
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u16 ptype;
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u8 ptg;
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u8 prof_id;
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u16 vsi;
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u16 vsig;
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u16 orig_vsig;
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u16 tcam_idx;
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};
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#define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT
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enum ice_prof_type {
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ICE_PROF_INVALID = 0x0,
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ICE_PROF_NON_TUN = 0x1,
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ICE_PROF_TUN_UDP = 0x2,
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ICE_PROF_TUN_GRE = 0x4,
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ICE_PROF_TUN_GTPU = 0x8,
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ICE_PROF_TUN_GTPC = 0x10,
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ICE_PROF_TUN_ALL = 0x1E,
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ICE_PROF_ALL = 0xFF,
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};
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/* Number of bits/bytes contained in meta init entry. Note, this should be a
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* multiple of 32 bits.
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*/
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#define ICE_META_INIT_BITS 192
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#define ICE_META_INIT_DW_CNT (ICE_META_INIT_BITS / (sizeof(__le32) * \
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BITS_PER_BYTE))
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/* The meta init Flag field starts at this bit */
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#define ICE_META_FLAGS_ST 123
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/* The entry and bit to check for Double VLAN Mode (DVM) support */
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#define ICE_META_VLAN_MODE_ENTRY 0
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#define ICE_META_FLAG_VLAN_MODE 60
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#define ICE_META_VLAN_MODE_BIT (ICE_META_FLAGS_ST + \
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ICE_META_FLAG_VLAN_MODE)
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struct ice_meta_init_entry {
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__le32 bm[ICE_META_INIT_DW_CNT];
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};
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struct ice_meta_init_section {
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__le16 count;
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__le16 offset;
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struct ice_meta_init_entry entry[1];
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};
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#endif /* _ICE_FLEX_TYPE_H_ */
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