908 lines
21 KiB
C
908 lines
21 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2007 Marvell Semiconductor, Inc.
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* Copyright (c) 2007 Sam Leffler, Errno Consulting
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* Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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#ifdef __FreeBSD__
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#endif
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/endian.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/firmware.h>
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#include <sys/socket.h>
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#include <machine/bus.h>
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#include <sys/bus.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/ethernet.h>
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#include <net80211/ieee80211_var.h>
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#include <dev/malo/if_malo.h>
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#define MALO_WAITOK 1
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#define MALO_NOWAIT 0
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#define _CMD_SETUP(pCmd, _type, _cmd) do { \
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pCmd = (_type *)&mh->mh_cmdbuf[0]; \
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memset(pCmd, 0, sizeof(_type)); \
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pCmd->cmdhdr.cmd = htole16(_cmd); \
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pCmd->cmdhdr.length = htole16(sizeof(_type)); \
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} while (0)
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static __inline uint32_t
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malo_hal_read4(struct malo_hal *mh, bus_size_t off)
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{
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return bus_space_read_4(mh->mh_iot, mh->mh_ioh, off);
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}
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static __inline void
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malo_hal_write4(struct malo_hal *mh, bus_size_t off, uint32_t val)
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{
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bus_space_write_4(mh->mh_iot, mh->mh_ioh, off, val);
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}
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static void
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malo_hal_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
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{
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bus_addr_t *paddr = (bus_addr_t*) arg;
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KASSERT(error == 0, ("error %u on bus_dma callback", error));
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*paddr = segs->ds_addr;
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}
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/*
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* Setup for communication with the device. We allocate
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* a command buffer and map it for bus dma use. The pci
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* device id is used to identify whether the device has
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* SRAM on it (in which case f/w download must include a
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* memory controller reset). All bus i/o operations happen
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* in BAR 1; the driver passes in the tag and handle we need.
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*/
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struct malo_hal *
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malo_hal_attach(device_t dev, uint16_t devid,
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bus_space_handle_t ioh, bus_space_tag_t iot, bus_dma_tag_t tag)
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{
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int error;
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struct malo_hal *mh;
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mh = malloc(sizeof(struct malo_hal), M_DEVBUF, M_NOWAIT | M_ZERO);
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if (mh == NULL)
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return NULL;
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mh->mh_dev = dev;
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mh->mh_ioh = ioh;
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mh->mh_iot = iot;
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snprintf(mh->mh_mtxname, sizeof(mh->mh_mtxname),
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"%s_hal", device_get_nameunit(dev));
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mtx_init(&mh->mh_mtx, mh->mh_mtxname, NULL, MTX_DEF);
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/*
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* Allocate the command buffer and map into the address
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* space of the h/w. We request "coherent" memory which
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* will be uncached on some architectures.
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*/
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error = bus_dma_tag_create(tag, /* parent */
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PAGE_SIZE, 0, /* alignment, bounds */
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BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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MALO_CMDBUF_SIZE, /* maxsize */
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1, /* nsegments */
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MALO_CMDBUF_SIZE, /* maxsegsize */
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BUS_DMA_ALLOCNOW, /* flags */
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NULL, /* lockfunc */
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NULL, /* lockarg */
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&mh->mh_dmat);
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if (error != 0) {
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device_printf(dev, "unable to allocate memory for cmd tag, "
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"error %u\n", error);
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goto fail;
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}
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/* allocate descriptors */
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error = bus_dmamem_alloc(mh->mh_dmat, (void**) &mh->mh_cmdbuf,
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BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
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&mh->mh_dmamap);
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if (error != 0) {
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device_printf(dev, "unable to allocate memory for cmd buffer, "
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"error %u\n", error);
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goto fail;
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}
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error = bus_dmamap_load(mh->mh_dmat, mh->mh_dmamap,
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mh->mh_cmdbuf, MALO_CMDBUF_SIZE,
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malo_hal_load_cb, &mh->mh_cmdaddr,
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BUS_DMA_NOWAIT);
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if (error != 0) {
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device_printf(dev, "unable to load cmd buffer, error %u\n",
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error);
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goto fail;
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}
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return (mh);
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fail:
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if (mh->mh_cmdbuf != NULL)
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bus_dmamem_free(mh->mh_dmat, mh->mh_cmdbuf,
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mh->mh_dmamap);
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if (mh->mh_dmat)
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bus_dma_tag_destroy(mh->mh_dmat);
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free(mh, M_DEVBUF);
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return (NULL);
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}
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/*
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* Low level firmware cmd block handshake support.
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*/
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static void
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malo_hal_send_cmd(struct malo_hal *mh)
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{
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bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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malo_hal_write4(mh, MALO_REG_GEN_PTR, mh->mh_cmdaddr);
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malo_hal_read4(mh, MALO_REG_INT_CODE);
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malo_hal_write4(mh, MALO_REG_H2A_INTERRUPT_EVENTS,
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MALO_H2ARIC_BIT_DOOR_BELL);
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}
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static int
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malo_hal_waitforcmd(struct malo_hal *mh, uint16_t cmd)
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{
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#define MAX_WAIT_FW_COMPLETE_ITERATIONS 10000
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int i;
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for (i = 0; i < MAX_WAIT_FW_COMPLETE_ITERATIONS; i++) {
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if (mh->mh_cmdbuf[0] == le16toh(cmd))
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return 1;
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DELAY(1 * 1000);
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}
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return 0;
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#undef MAX_WAIT_FW_COMPLETE_ITERATIONS
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}
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static int
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malo_hal_execute_cmd(struct malo_hal *mh, unsigned short cmd)
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{
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MALO_HAL_LOCK_ASSERT(mh);
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if ((mh->mh_flags & MHF_FWHANG) &&
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(mh->mh_debug & MALO_HAL_DEBUG_IGNHANG) == 0) {
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device_printf(mh->mh_dev, "firmware hung, skipping cmd 0x%x\n",
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cmd);
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return ENXIO;
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}
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if (malo_hal_read4(mh, MALO_REG_INT_CODE) == 0xffffffff) {
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device_printf(mh->mh_dev, "%s: device not present!\n",
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__func__);
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return EIO;
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}
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malo_hal_send_cmd(mh);
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if (!malo_hal_waitforcmd(mh, cmd | 0x8000)) {
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device_printf(mh->mh_dev,
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"timeout waiting for f/w cmd 0x%x\n", cmd);
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mh->mh_flags |= MHF_FWHANG;
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return ETIMEDOUT;
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}
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bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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return 0;
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}
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static int
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malo_hal_get_cal_table(struct malo_hal *mh, uint8_t annex, uint8_t index)
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{
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struct malo_cmd_caltable *cmd;
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int ret;
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MALO_HAL_LOCK_ASSERT(mh);
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_CMD_SETUP(cmd, struct malo_cmd_caltable, MALO_HOSTCMD_GET_CALTABLE);
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cmd->annex = annex;
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cmd->index = index;
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ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_GET_CALTABLE);
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if (ret == 0 && cmd->caltbl[0] != annex && annex != 0 && annex != 255)
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ret = EIO;
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return ret;
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}
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static int
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malo_hal_get_pwrcal_table(struct malo_hal *mh, struct malo_hal_caldata *cal)
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{
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const uint8_t *data;
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int len;
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MALO_HAL_LOCK(mh);
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/* NB: we hold the lock so it's ok to use cmdbuf */
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data = ((const struct malo_cmd_caltable *) mh->mh_cmdbuf)->caltbl;
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if (malo_hal_get_cal_table(mh, 33, 0) == 0) {
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len = (data[2] | (data[3] << 8)) - 12;
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/* XXX validate len */
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memcpy(cal->pt_ratetable_20m, &data[12], len);
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}
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mh->mh_flags |= MHF_CALDATA;
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MALO_HAL_UNLOCK(mh);
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return 0;
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}
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/*
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* Reset internal state after a firmware download.
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*/
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static int
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malo_hal_resetstate(struct malo_hal *mh)
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{
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/*
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* Fetch cal data for later use.
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* XXX may want to fetch other stuff too.
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*/
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if ((mh->mh_flags & MHF_CALDATA) == 0)
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malo_hal_get_pwrcal_table(mh, &mh->mh_caldata);
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return 0;
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}
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static void
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malo_hal_fw_reset(struct malo_hal *mh)
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{
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if (malo_hal_read4(mh, MALO_REG_INT_CODE) == 0xffffffff) {
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device_printf(mh->mh_dev, "%s: device not present!\n",
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__func__);
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return;
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}
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malo_hal_write4(mh, MALO_REG_H2A_INTERRUPT_EVENTS, MALO_ISR_RESET);
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mh->mh_flags &= ~MHF_FWHANG;
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}
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static void
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malo_hal_trigger_pcicmd(struct malo_hal *mh)
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{
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bus_dmamap_sync(mh->mh_dmat, mh->mh_dmamap, BUS_DMASYNC_PREWRITE);
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malo_hal_write4(mh, MALO_REG_GEN_PTR, mh->mh_cmdaddr);
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malo_hal_read4(mh, MALO_REG_INT_CODE);
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malo_hal_write4(mh, MALO_REG_INT_CODE, 0x00);
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malo_hal_read4(mh, MALO_REG_INT_CODE);
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malo_hal_write4(mh, MALO_REG_H2A_INTERRUPT_EVENTS,
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MALO_H2ARIC_BIT_DOOR_BELL);
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malo_hal_read4(mh, MALO_REG_INT_CODE);
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}
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static int
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malo_hal_waitfor(struct malo_hal *mh, uint32_t val)
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{
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int i;
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for (i = 0; i < MALO_FW_MAX_NUM_CHECKS; i++) {
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DELAY(MALO_FW_CHECK_USECS);
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if (malo_hal_read4(mh, MALO_REG_INT_CODE) == val)
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return 0;
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}
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return -1;
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}
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/*
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* Firmware block xmit when talking to the boot-rom.
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*/
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static int
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malo_hal_send_helper(struct malo_hal *mh, int bsize,
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const void *data, size_t dsize, int waitfor)
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{
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mh->mh_cmdbuf[0] = htole16(MALO_HOSTCMD_CODE_DNLD);
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mh->mh_cmdbuf[1] = htole16(bsize);
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memcpy(&mh->mh_cmdbuf[4], data , dsize);
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malo_hal_trigger_pcicmd(mh);
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if (waitfor == MALO_NOWAIT)
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goto pass;
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/* XXX 2000 vs 200 */
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if (malo_hal_waitfor(mh, MALO_INT_CODE_CMD_FINISHED) != 0) {
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device_printf(mh->mh_dev,
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"%s: timeout waiting for CMD_FINISHED, INT_CODE 0x%x\n",
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__func__, malo_hal_read4(mh, MALO_REG_INT_CODE));
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return ETIMEDOUT;
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}
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pass:
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malo_hal_write4(mh, MALO_REG_INT_CODE, 0);
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return (0);
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}
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static int
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malo_hal_fwload_helper(struct malo_hal *mh, char *helper)
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{
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const struct firmware *fw;
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int error;
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fw = firmware_get(helper);
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if (fw == NULL) {
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device_printf(mh->mh_dev, "could not read microcode %s!\n",
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helper);
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return (EIO);
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}
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device_printf(mh->mh_dev, "load %s firmware image (%zu bytes)\n",
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helper, fw->datasize);
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error = malo_hal_send_helper(mh, fw->datasize, fw->data, fw->datasize,
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MALO_WAITOK);
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if (error != 0)
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goto fail;
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/* tell the card we're done and... */
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error = malo_hal_send_helper(mh, 0, NULL, 0, MALO_NOWAIT);
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fail:
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firmware_put(fw, FIRMWARE_UNLOAD);
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return (error);
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}
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/*
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* Firmware block xmit when talking to the 1st-stage loader.
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*/
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static int
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malo_hal_send_main(struct malo_hal *mh, const void *data, size_t dsize,
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uint16_t seqnum, int waitfor)
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{
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mh->mh_cmdbuf[0] = htole16(MALO_HOSTCMD_CODE_DNLD);
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mh->mh_cmdbuf[1] = htole16(dsize);
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mh->mh_cmdbuf[2] = htole16(seqnum);
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mh->mh_cmdbuf[3] = 0;
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memcpy(&mh->mh_cmdbuf[4], data, dsize);
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malo_hal_trigger_pcicmd(mh);
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if (waitfor == MALO_NOWAIT)
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goto pass;
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if (malo_hal_waitfor(mh, MALO_INT_CODE_CMD_FINISHED) != 0) {
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device_printf(mh->mh_dev,
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"%s: timeout waiting for CMD_FINISHED, INT_CODE 0x%x\n",
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__func__, malo_hal_read4(mh, MALO_REG_INT_CODE));
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return ETIMEDOUT;
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}
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pass:
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malo_hal_write4(mh, MALO_REG_INT_CODE, 0);
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return 0;
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}
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static int
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malo_hal_fwload_main(struct malo_hal *mh, char *firmware)
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{
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const struct firmware *fw;
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const uint8_t *fp;
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int error;
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size_t count;
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uint16_t seqnum;
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uint32_t blocksize;
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error = 0;
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fw = firmware_get(firmware);
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if (fw == NULL) {
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device_printf(mh->mh_dev, "could not read firmware %s!\n",
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firmware);
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return (EIO);
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}
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device_printf(mh->mh_dev, "load %s firmware image (%zu bytes)\n",
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firmware, fw->datasize);
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seqnum = 1;
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for (count = 0; count < fw->datasize; count += blocksize) {
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blocksize = MIN(256, fw->datasize - count);
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fp = (const uint8_t *)fw->data + count;
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error = malo_hal_send_main(mh, fp, blocksize, seqnum++,
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MALO_NOWAIT);
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if (error != 0)
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goto fail;
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DELAY(500);
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}
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/*
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* send a command with size 0 to tell that the firmware has been
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* uploaded
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*/
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error = malo_hal_send_main(mh, NULL, 0, seqnum++, MALO_NOWAIT);
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DELAY(100);
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fail:
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firmware_put(fw, FIRMWARE_UNLOAD);
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return (error);
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}
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int
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malo_hal_fwload(struct malo_hal *mh, char *helper, char *firmware)
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{
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int error, i;
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uint32_t fwreadysig, opmode;
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/*
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* NB: now malo(4) supports only STA mode. It will be better if it
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* supports AP mode.
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*/
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fwreadysig = MALO_HOSTCMD_STA_FWRDY_SIGNATURE;
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opmode = MALO_HOSTCMD_STA_MODE;
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malo_hal_fw_reset(mh);
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malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_CLEAR_SEL,
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MALO_A2HRIC_BIT_MASK);
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malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_CAUSE, 0x00);
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malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_MASK, 0x00);
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|
malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_STATUS_MASK,
|
|
MALO_A2HRIC_BIT_MASK);
|
|
|
|
error = malo_hal_fwload_helper(mh, helper);
|
|
if (error != 0) {
|
|
device_printf(mh->mh_dev, "failed to load bootrom loader.\n");
|
|
goto fail;
|
|
}
|
|
|
|
DELAY(200 * MALO_FW_CHECK_USECS);
|
|
|
|
error = malo_hal_fwload_main(mh, firmware);
|
|
if (error != 0) {
|
|
device_printf(mh->mh_dev, "failed to load firmware.\n");
|
|
goto fail;
|
|
}
|
|
|
|
/*
|
|
* Wait for firmware to startup; we monitor the INT_CODE register
|
|
* waiting for a signature to written back indicating it's ready to go.
|
|
*/
|
|
mh->mh_cmdbuf[1] = 0;
|
|
|
|
if (opmode != MALO_HOSTCMD_STA_MODE)
|
|
malo_hal_trigger_pcicmd(mh);
|
|
|
|
for (i = 0; i < MALO_FW_MAX_NUM_CHECKS; i++) {
|
|
malo_hal_write4(mh, MALO_REG_GEN_PTR, opmode);
|
|
DELAY(MALO_FW_CHECK_USECS);
|
|
if (malo_hal_read4(mh, MALO_REG_INT_CODE) == fwreadysig) {
|
|
malo_hal_write4(mh, MALO_REG_INT_CODE, 0x00);
|
|
return malo_hal_resetstate(mh);
|
|
}
|
|
}
|
|
|
|
return ETIMEDOUT;
|
|
fail:
|
|
malo_hal_fw_reset(mh);
|
|
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* Return "hw specs". Note this must be the first cmd MUST be done after
|
|
* a firmware download or the f/w will lockup.
|
|
*/
|
|
int
|
|
malo_hal_gethwspecs(struct malo_hal *mh, struct malo_hal_hwspec *hw)
|
|
{
|
|
struct malo_cmd_get_hwspec *cmd;
|
|
int ret;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_get_hwspec, MALO_HOSTCMD_GET_HW_SPEC);
|
|
memset(&cmd->permaddr[0], 0xff, IEEE80211_ADDR_LEN);
|
|
cmd->ul_fw_awakecookie = htole32((unsigned int)mh->mh_cmdaddr + 2048);
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_GET_HW_SPEC);
|
|
if (ret == 0) {
|
|
IEEE80211_ADDR_COPY(hw->macaddr, cmd->permaddr);
|
|
hw->wcbbase[0] = le32toh(cmd->wcbbase0) & 0x0000ffff;
|
|
hw->wcbbase[1] = le32toh(cmd->wcbbase1) & 0x0000ffff;
|
|
hw->wcbbase[2] = le32toh(cmd->wcbbase2) & 0x0000ffff;
|
|
hw->wcbbase[3] = le32toh(cmd->wcbbase3) & 0x0000ffff;
|
|
hw->rxdesc_read = le32toh(cmd->rxpdrd_ptr)& 0x0000ffff;
|
|
hw->rxdesc_write = le32toh(cmd->rxpdwr_ptr)& 0x0000ffff;
|
|
hw->regioncode = le16toh(cmd->regioncode) & 0x00ff;
|
|
hw->fw_releasenum = le32toh(cmd->fw_releasenum);
|
|
hw->maxnum_wcb = le16toh(cmd->num_wcb);
|
|
hw->maxnum_mcaddr = le16toh(cmd->num_mcastaddr);
|
|
hw->num_antenna = le16toh(cmd->num_antenna);
|
|
hw->hwversion = cmd->version;
|
|
hw->hostinterface = cmd->hostif;
|
|
}
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|
|
|
|
void
|
|
malo_hal_detach(struct malo_hal *mh)
|
|
{
|
|
|
|
bus_dmamem_free(mh->mh_dmat, mh->mh_cmdbuf, mh->mh_dmamap);
|
|
bus_dma_tag_destroy(mh->mh_dmat);
|
|
mtx_destroy(&mh->mh_mtx);
|
|
free(mh, M_DEVBUF);
|
|
}
|
|
|
|
/*
|
|
* Configure antenna use. Takes effect immediately.
|
|
*
|
|
* XXX tx antenna setting ignored
|
|
* XXX rx antenna setting should always be 3 (for now)
|
|
*/
|
|
int
|
|
malo_hal_setantenna(struct malo_hal *mh, enum malo_hal_antenna dirset, int ant)
|
|
{
|
|
struct malo_cmd_rf_antenna *cmd;
|
|
int ret;
|
|
|
|
if (!(dirset == MHA_ANTENNATYPE_RX || dirset == MHA_ANTENNATYPE_TX))
|
|
return EINVAL;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_rf_antenna,
|
|
MALO_HOSTCMD_802_11_RF_ANTENNA);
|
|
cmd->action = htole16(dirset);
|
|
if (ant == 0) { /* default to all/both antennae */
|
|
/* XXX never reach now. */
|
|
ant = 3;
|
|
}
|
|
cmd->mode = htole16(ant);
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_802_11_RF_ANTENNA);
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Configure radio. Takes effect immediately.
|
|
*
|
|
* XXX preamble installed after set fixed rate cmd
|
|
*/
|
|
int
|
|
malo_hal_setradio(struct malo_hal *mh, int onoff,
|
|
enum malo_hal_preamble preamble)
|
|
{
|
|
struct malo_cmd_radio_control *cmd;
|
|
int ret;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_radio_control,
|
|
MALO_HOSTCMD_802_11_RADIO_CONTROL);
|
|
cmd->action = htole16(MALO_HOSTCMD_ACT_GEN_SET);
|
|
if (onoff == 0)
|
|
cmd->control = 0;
|
|
else
|
|
cmd->control = htole16(preamble);
|
|
cmd->radio_on = htole16(onoff);
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_802_11_RADIO_CONTROL);
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Set the interrupt mask.
|
|
*/
|
|
void
|
|
malo_hal_intrset(struct malo_hal *mh, uint32_t mask)
|
|
{
|
|
|
|
malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_MASK, 0);
|
|
(void)malo_hal_read4(mh, MALO_REG_INT_CODE);
|
|
|
|
mh->mh_imask = mask;
|
|
malo_hal_write4(mh, MALO_REG_A2H_INTERRUPT_MASK, mask);
|
|
(void)malo_hal_read4(mh, MALO_REG_INT_CODE);
|
|
}
|
|
|
|
int
|
|
malo_hal_setchannel(struct malo_hal *mh, const struct malo_hal_channel *chan)
|
|
{
|
|
struct malo_cmd_fw_set_rf_channel *cmd;
|
|
int ret;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_fw_set_rf_channel,
|
|
MALO_HOSTCMD_SET_RF_CHANNEL);
|
|
cmd->action = htole16(MALO_HOSTCMD_ACT_GEN_SET);
|
|
cmd->cur_channel = chan->channel;
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_RF_CHANNEL);
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int
|
|
malo_hal_settxpower(struct malo_hal *mh, const struct malo_hal_channel *c)
|
|
{
|
|
struct malo_cmd_rf_tx_power *cmd;
|
|
const struct malo_hal_caldata *cal = &mh->mh_caldata;
|
|
uint8_t chan = c->channel;
|
|
uint16_t pow;
|
|
int i, idx, ret;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_rf_tx_power,
|
|
MALO_HOSTCMD_802_11_RF_TX_POWER);
|
|
cmd->action = htole16(MALO_HOSTCMD_ACT_GEN_SET_LIST);
|
|
for (i = 0; i < 4; i++) {
|
|
idx = (chan - 1) * 4 + i;
|
|
pow = cal->pt_ratetable_20m[idx];
|
|
cmd->power_levellist[i] = htole16(pow);
|
|
}
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_802_11_RF_TX_POWER);
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int
|
|
malo_hal_setpromisc(struct malo_hal *mh, int enable)
|
|
{
|
|
/* XXX need host cmd */
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
malo_hal_setassocid(struct malo_hal *mh,
|
|
const uint8_t bssid[IEEE80211_ADDR_LEN], uint16_t associd)
|
|
{
|
|
struct malo_cmd_fw_set_aid *cmd;
|
|
int ret;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_fw_set_aid,
|
|
MALO_HOSTCMD_SET_AID);
|
|
cmd->cmdhdr.seqnum = 1;
|
|
cmd->associd = htole16(associd);
|
|
IEEE80211_ADDR_COPY(&cmd->macaddr[0], bssid);
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_AID);
|
|
MALO_HAL_UNLOCK(mh);
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Kick the firmware to tell it there are new tx descriptors
|
|
* for processing. The driver says what h/w q has work in
|
|
* case the f/w ever gets smarter.
|
|
*/
|
|
void
|
|
malo_hal_txstart(struct malo_hal *mh, int qnum)
|
|
{
|
|
bus_space_write_4(mh->mh_iot, mh->mh_ioh,
|
|
MALO_REG_H2A_INTERRUPT_EVENTS, MALO_H2ARIC_BIT_PPA_READY);
|
|
(void) bus_space_read_4(mh->mh_iot, mh->mh_ioh, MALO_REG_INT_CODE);
|
|
}
|
|
|
|
/*
|
|
* Return the current ISR setting and clear the cause.
|
|
*/
|
|
void
|
|
malo_hal_getisr(struct malo_hal *mh, uint32_t *status)
|
|
{
|
|
uint32_t cause;
|
|
|
|
cause = bus_space_read_4(mh->mh_iot, mh->mh_ioh,
|
|
MALO_REG_A2H_INTERRUPT_CAUSE);
|
|
if (cause == 0xffffffff) { /* card removed */
|
|
cause = 0;
|
|
} else if (cause != 0) {
|
|
/* clear cause bits */
|
|
bus_space_write_4(mh->mh_iot, mh->mh_ioh,
|
|
MALO_REG_A2H_INTERRUPT_CAUSE, cause &~ mh->mh_imask);
|
|
(void) bus_space_read_4(mh->mh_iot, mh->mh_ioh,
|
|
MALO_REG_INT_CODE);
|
|
cause &= mh->mh_imask;
|
|
}
|
|
|
|
*status = cause;
|
|
}
|
|
|
|
/*
|
|
* Callback from the driver on a cmd done interrupt. Nothing to do right
|
|
* now as we spin waiting for cmd completion.
|
|
*/
|
|
void
|
|
malo_hal_cmddone(struct malo_hal *mh)
|
|
{
|
|
/* NB : do nothing. */
|
|
}
|
|
|
|
int
|
|
malo_hal_prescan(struct malo_hal *mh)
|
|
{
|
|
struct malo_cmd_prescan *cmd;
|
|
int ret;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_prescan, MALO_HOSTCMD_SET_PRE_SCAN);
|
|
cmd->cmdhdr.seqnum = 1;
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_PRE_SCAN);
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int
|
|
malo_hal_postscan(struct malo_hal *mh, uint8_t *macaddr, uint8_t ibsson)
|
|
{
|
|
struct malo_cmd_postscan *cmd;
|
|
int ret;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_postscan, MALO_HOSTCMD_SET_POST_SCAN);
|
|
cmd->cmdhdr.seqnum = 1;
|
|
cmd->isibss = htole32(ibsson);
|
|
IEEE80211_ADDR_COPY(&cmd->bssid[0], macaddr);
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_POST_SCAN);
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int
|
|
malo_hal_set_slot(struct malo_hal *mh, int is_short)
|
|
{
|
|
int ret;
|
|
struct malo_cmd_fw_setslot *cmd;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_fw_setslot, MALO_HOSTCMD_SET_SLOT);
|
|
cmd->action = htole16(MALO_HOSTCMD_ACT_GEN_SET);
|
|
cmd->slot = (is_short == 1 ? 1 : 0);
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_SLOT);
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int
|
|
malo_hal_set_rate(struct malo_hal *mh, uint16_t curmode, uint8_t rate)
|
|
{
|
|
int i, ret;
|
|
struct malo_cmd_set_rate *cmd;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_set_rate, MALO_HOSTCMD_SET_RATE);
|
|
cmd->aprates[0] = 2;
|
|
cmd->aprates[1] = 4;
|
|
cmd->aprates[2] = 11;
|
|
cmd->aprates[3] = 22;
|
|
if (curmode == IEEE80211_MODE_11G) {
|
|
cmd->aprates[4] = 0; /* XXX reserved? */
|
|
cmd->aprates[5] = 12;
|
|
cmd->aprates[6] = 18;
|
|
cmd->aprates[7] = 24;
|
|
cmd->aprates[8] = 36;
|
|
cmd->aprates[9] = 48;
|
|
cmd->aprates[10] = 72;
|
|
cmd->aprates[11] = 96;
|
|
cmd->aprates[12] = 108;
|
|
}
|
|
|
|
if (rate != 0) {
|
|
/* fixed rate */
|
|
for (i = 0; i < 13; i++) {
|
|
if (cmd->aprates[i] == rate) {
|
|
cmd->rateindex = i;
|
|
cmd->dataratetype = 1;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_SET_RATE);
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int
|
|
malo_hal_setmcast(struct malo_hal *mh, int nmc, const uint8_t macs[])
|
|
{
|
|
struct malo_cmd_mcast *cmd;
|
|
int ret;
|
|
|
|
if (nmc > MALO_HAL_MCAST_MAX)
|
|
return EINVAL;
|
|
|
|
MALO_HAL_LOCK(mh);
|
|
|
|
_CMD_SETUP(cmd, struct malo_cmd_mcast, MALO_HOSTCMD_MAC_MULTICAST_ADR);
|
|
memcpy(cmd->maclist, macs, nmc * IEEE80211_ADDR_LEN);
|
|
cmd->numaddr = htole16(nmc);
|
|
cmd->action = htole16(0xffff);
|
|
|
|
ret = malo_hal_execute_cmd(mh, MALO_HOSTCMD_MAC_MULTICAST_ADR);
|
|
|
|
MALO_HAL_UNLOCK(mh);
|
|
|
|
return ret;
|
|
}
|