217 lines
5.3 KiB
C
217 lines
5.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Alstom Group.
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* Copyright (c) 2021 Semihalf.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Driver for TI DP83822 Ethernet PHY
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/socket.h>
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#include <machine/resource.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include "miidevs.h"
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#include "miibus_if.h"
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#define BIT(x) (1 << (x))
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#define DP83822_PHYSTS 0x10
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#define DP83822_PHYSTS_LINK_UP BIT(0)
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#define DP83822_PHYSTS_SPEED_100 BIT(1)
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#define DP83822_PHYSTS_FD BIT(2)
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#define DP83822_PHYSCR 0x11
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#define DP83822_PHYSCR_INT_OE BIT(0) /* Behaviour of INT pin. */
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#define DP83822_PHYSCR_INT_EN BIT(1)
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#define DP83822_MISR1 0x12
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#define DP83822_MISR1_AN_CMPL_EN BIT(2)
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#define DP83822_MISR1_DP_CHG_EN BIT(3)
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#define DP83822_MISR1_SPD_CHG_EN BIT(4)
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#define DP83822_MISR1_LINK_CHG_EN BIT(5)
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#define DP83822_MISR1_INT_MASK 0xFF
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#define DP83822_MISR1_INT_STS_SHIFT 8
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#define DP83822_MISR2 0x13
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#define DP83822_MISR2_AN_ERR_EN BIT(6)
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#define DP83822_MISR2_INT_MASK 0xFF
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#define DP83822_MISR2_INT_STS_SHIFT 8
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static int dp_service(struct mii_softc*, struct mii_data*, int);
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struct dp83822_softc {
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struct mii_softc mii_sc;
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struct resource *irq_res;
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void *irq_cookie;
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};
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static const struct mii_phydesc dpphys[] = {
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MII_PHY_DESC(xxTI, DP83822),
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MII_PHY_END
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};
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static const struct mii_phy_funcs dpphy_funcs = {
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dp_service,
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ukphy_status,
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mii_phy_reset
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};
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static void
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dp_intr(void *arg)
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{
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struct mii_softc *sc = (struct mii_softc *)arg;
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uint32_t status;
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status = PHY_READ(sc, DP83822_MISR1);
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if (!((status >> DP83822_MISR1_INT_STS_SHIFT) &
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(status & DP83822_MISR1_INT_MASK)))
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return;
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PHY_STATUS(sc);
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mii_phy_update(sc, MII_MEDIACHG);
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}
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static int
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dp_probe(device_t dev)
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{
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return (mii_phy_dev_probe(dev, dpphys, BUS_PROBE_DEFAULT));
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}
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static int
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dp_attach(device_t dev)
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{
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struct dp83822_softc *sc;
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struct mii_softc *mii_sc;
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uint32_t value;
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int error, rid;
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sc = device_get_softc(dev);
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mii_sc = &sc->mii_sc;
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mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &dpphy_funcs, 1);
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PHY_RESET(mii_sc);
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rid = 0;
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sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
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if (sc->irq_res == NULL)
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goto no_irq;
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error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET | INTR_MPSAFE,
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NULL, dp_intr, sc, &sc->irq_cookie);
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if (error != 0) {
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
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sc->irq_res = NULL;
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goto no_irq;
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}
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/*
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* ACK and unmask all relevant interrupts.
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* We have a single register that serves the purpose
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* of both interrupt status and mask.
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* Interrupts are cleared on read.
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*/
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(void)PHY_READ(mii_sc, DP83822_MISR1);
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value = DP83822_MISR1_AN_CMPL_EN |
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DP83822_MISR1_DP_CHG_EN |
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DP83822_MISR1_SPD_CHG_EN |
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DP83822_MISR1_LINK_CHG_EN;
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PHY_WRITE(mii_sc, DP83822_MISR1, value);
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value = PHY_READ(mii_sc, DP83822_PHYSCR);
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value |= DP83822_PHYSCR_INT_OE |
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DP83822_PHYSCR_INT_EN;
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PHY_WRITE(mii_sc, DP83822_PHYSCR, value);
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no_irq:
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return (0);
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}
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static int
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dp_detach(device_t dev)
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{
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struct dp83822_softc *sc;
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sc = device_get_softc(dev);
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bus_teardown_intr(dev, sc->irq_res, sc->irq_cookie);
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bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
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return (mii_phy_detach(dev));
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}
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static int
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dp_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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switch (cmd) {
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case MII_POLLSTAT:
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break;
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case MII_MEDIACHG:
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mii_phy_setmedia(sc);
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break;
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case MII_TICK:
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if (mii_phy_tick(sc) == EJUSTRETURN)
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return (0);
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break;
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}
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PHY_STATUS(sc);
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mii_phy_update(sc, cmd);
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return (0);
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}
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static device_method_t dp_methods[] = {
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DEVMETHOD(device_probe, dp_probe),
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DEVMETHOD(device_attach, dp_attach),
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DEVMETHOD(device_detach, dp_detach),
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DEVMETHOD_END
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};
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static driver_t dp_driver = {
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"dp83822phy",
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dp_methods,
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sizeof(struct dp83822_softc)
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};
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DRIVER_MODULE(dp83822phy, miibus, dp_driver, 0, 0);
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