256 lines
6.0 KiB
C
256 lines
6.0 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (C) 2013 Emulex
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the Emulex Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Contact Information:
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* freebsd-drivers@emulex.com
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*
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* Emulex
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* 3333 Susan Street
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* Costa Mesa, CA 92626
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*/
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#include "oce_if.h"
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static void oce_dma_map_ring(void *arg,
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bus_dma_segment_t *segs,
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int nseg,
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int error);
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/**
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* @brief Allocate DMA memory
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* @param sc software handle to the device
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* @param size bus size
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* @param dma dma memory area
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* @param flags creation flags
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* @returns 0 on success, error otherwize
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*/
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int
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oce_dma_alloc(POCE_SOFTC sc, bus_size_t size, POCE_DMA_MEM dma, int flags)
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{
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int rc;
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memset(dma, 0, sizeof(OCE_DMA_MEM));
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rc = bus_dma_tag_create(bus_get_dma_tag(sc->dev),
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8, 0,
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BUS_SPACE_MAXADDR,
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BUS_SPACE_MAXADDR,
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NULL, NULL,
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size, 1, size, 0, NULL, NULL, &dma->tag);
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if (rc == 0) {
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rc = bus_dmamem_alloc(dma->tag,
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&dma->ptr,
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BUS_DMA_NOWAIT | BUS_DMA_COHERENT |
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BUS_DMA_ZERO,
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&dma->map);
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}
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dma->paddr = 0;
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if (rc == 0) {
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rc = bus_dmamap_load(dma->tag,
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dma->map,
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dma->ptr,
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size,
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oce_dma_map_addr,
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&dma->paddr, flags | BUS_DMA_NOWAIT);
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if (dma->paddr == 0)
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rc = ENXIO;
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}
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if (rc != 0)
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oce_dma_free(sc, dma);
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return rc;
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}
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/**
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* @brief Free DMA memory
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* @param sc software handle to the device
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* @param dma dma area to free
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*/
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void
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oce_dma_free(POCE_SOFTC sc, POCE_DMA_MEM dma)
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{
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if (dma->tag == NULL)
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return;
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if (dma->paddr != 0) {
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bus_dmamap_sync(dma->tag, dma->map,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(dma->tag, dma->map);
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dma->paddr = 0;
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}
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if (dma->ptr != NULL) {
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bus_dmamem_free(dma->tag, dma->ptr, dma->map);
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dma->ptr = NULL;
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}
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bus_dma_tag_destroy(dma->tag);
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dma->tag = NULL;
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return;
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}
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/**
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* @brief Map DMA memory segment addresses
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* @param arg physical address pointer
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* @param segs dma memory segments
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* @param nseg number of dma memory segments
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* @param error if error, zeroes the physical address
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*/
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void
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oce_dma_map_addr(void *arg, bus_dma_segment_t * segs, int nseg, int error)
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{
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bus_addr_t *paddr = arg;
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if (error)
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*paddr = 0;
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else
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*paddr = segs->ds_addr;
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}
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/**
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* @brief Destroy a ring buffer
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* @param sc software handle to the device
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* @param ring ring buffer
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*/
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void
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oce_destroy_ring_buffer(POCE_SOFTC sc, oce_ring_buffer_t *ring)
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{
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oce_dma_free(sc, &ring->dma);
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free(ring, M_DEVBUF);
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}
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oce_ring_buffer_t *
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oce_create_ring_buffer(POCE_SOFTC sc,
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uint32_t q_len, uint32_t item_size)
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{
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uint32_t size = q_len * item_size;
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int rc;
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oce_ring_buffer_t *ring;
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ring = malloc(sizeof(oce_ring_buffer_t), M_DEVBUF, M_NOWAIT | M_ZERO);
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if (ring == NULL)
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return NULL;
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ring->item_size = item_size;
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ring->num_items = q_len;
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rc = bus_dma_tag_create(bus_get_dma_tag(sc->dev),
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4096, 0,
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BUS_SPACE_MAXADDR,
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BUS_SPACE_MAXADDR,
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NULL, NULL,
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size, 8, 4096, 0, NULL, NULL, &ring->dma.tag);
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if (rc)
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goto fail;
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rc = bus_dmamem_alloc(ring->dma.tag,
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&ring->dma.ptr,
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BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
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&ring->dma.map);
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if (rc)
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goto fail;
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bzero(ring->dma.ptr, size);
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bus_dmamap_sync(ring->dma.tag, ring->dma.map,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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ring->dma.paddr = 0;
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return ring;
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fail:
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oce_dma_free(sc, &ring->dma);
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free(ring, M_DEVBUF);
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ring = NULL;
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return NULL;
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}
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struct _oce_dmamap_paddr_table {
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uint32_t max_entries;
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uint32_t num_entries;
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struct phys_addr *paddrs;
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};
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/**
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* @brief Map ring buffer
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* @param arg dma map phyical address table pointer
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* @param segs dma memory segments
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* @param nseg number of dma memory segments
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* @param error maps only if error is 0
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*/
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static void
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oce_dma_map_ring(void *arg, bus_dma_segment_t * segs, int nseg, int error)
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{
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int i;
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struct _oce_dmamap_paddr_table *dpt =
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(struct _oce_dmamap_paddr_table *)arg;
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if (error == 0) {
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if (nseg <= dpt->max_entries) {
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for (i = 0; i < nseg; i++) {
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dpt->paddrs[i].lo = ADDR_LO(segs[i].ds_addr);
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dpt->paddrs[i].hi = ADDR_HI(segs[i].ds_addr);
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}
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dpt->num_entries = nseg;
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}
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}
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}
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/**
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* @brief Load bus dma map for a ring buffer
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* @param ring ring buffer pointer
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* @param pa_list physical address list
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* @returns number entries
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*/
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uint32_t
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oce_page_list(oce_ring_buffer_t *ring, struct phys_addr *pa_list)
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{
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struct _oce_dmamap_paddr_table dpt;
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dpt.max_entries = 8;
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dpt.num_entries = 0;
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dpt.paddrs = pa_list;
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bus_dmamap_load(ring->dma.tag,
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ring->dma.map,
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ring->dma.ptr,
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ring->item_size * ring->num_items,
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oce_dma_map_ring, &dpt, BUS_DMA_NOWAIT);
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return dpt.num_entries;
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}
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