Joseph Koshy bebaef4a3d Process one NMI interrupt per handler invocation as the processor ... 'buffers' pending NMIs from multiple interrupting PMCs and delivers them serially. Reported by: Olivier Crameri <olivier.crameri@epfl.ch> MFC after: 3 days		2005-09-12 15:55:44 +00:00
..
hwpmc_alpha.c
hwpmc_amd.c	Process one NMI interrupt per handler invocation as the processor	2005-09-12 15:55:44 +00:00
hwpmc_amd.h
hwpmc_arm.c
hwpmc_ia64.c
hwpmc_logging.c
hwpmc_mod.c	Return EOPNOTSUPP instead of EINVAL if a PMC allocation request	2005-08-22 18:18:20 +00:00
hwpmc_pentium.c
hwpmc_pentium.h
hwpmc_piv.c
hwpmc_piv.h
hwpmc_powerpc.c
hwpmc_ppro.c
hwpmc_ppro.h
hwpmc_sparc64.c
hwpmc_x86.c	On x86 processors, turn off any 'INTERRUPT' capabilities on PMCs	2005-08-22 18:20:41 +00:00
pmc_events.h