ae1f3df434
only gpiobus configured via FDT is supported. Bus enumeration is supported. Devices are created for each device found. 1-Wire temperature controllers are supported, but other drivers could be written. Temperatures are polled and reported via a sysctl. Errors are reported via sysctl counters. Mis-wired bus detection is included for more trouble shooting. See ow(4), owc(4) and ow_temp(4) for details of what's supported and known issues. This has been tested on Raspberry Pi-B, Pi2 and Beagle Bone Black with up to 7 devices. Differential Revision: https://reviews.freebsd.org/D2956 Relnotes: yes MFC after: 2 weeks Reviewed by: loos@ (with many insightful comments)
159 lines
5.9 KiB
Objective-C
159 lines
5.9 KiB
Objective-C
#-
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# Copyright (c) 2015 M. Warner Losh <imp@freebsd.org>
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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#
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# $FreeBSD$
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#
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#include <sys/bus.h>
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#include <dev/ow/owll.h>
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INTERFACE owll;
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#
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# Dallas Semiconductor 1-Wire bus Link Layer (owll)
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#
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# See Maxim Application Note AN937: Book of iButton Standards for the
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# 1-Wire protocol specification.
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# http://pdfserv.maximintegrated.com/en/an/AN937.pdf
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#
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# Note: 1-Wire is a registered trademark of Maxim Integrated Products, Inc.
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#
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# This file provides an interface to the logical layer of the protocol.
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# Although the first implementation is done with GPIO bit banging, some
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# SoCs have a 1-Wire controller with more smarts or hardware offload.
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# Maxim datasheets also describe how to use UARTs to generate timing,
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# as well as both usb and i2c 1-Wire controllers.
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#
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# Chapter 4 has all the electrical timing diagrams that make up the link
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# layer of this protocol.
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#
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# Two speed classes are defined: Regular speed and Overdrive speed.
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# It is the responsibility of a device implementing the owll(9) interface
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# to ensure that the timings are met:
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#
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# Regular Overdrive
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#
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# 60us <= tSLOT < 120us 6us <= tSLOT <= 16us
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# 60us <= tLOW0 < tSLOT < 120us 6us <= tLOW0 < tSLOT < 16us
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# 1us <= tLOW1 < 15us 1us <= tLOW < 2us
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# 1us < tLOWR < 15us 1us <= tLOWR < 2us
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# 0 <= tRELEASE < 45us 0 <= tRELEASE < 4us
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# 1us <= tREC < inf 1us <= tREC < inf
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# tRDV = 15us tRDV = 2us
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# 480us <= tRSTL < inf 48us <= tRSTL < 80us
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# 480us <= tRSTH < inf 48us <= tRSTH < inf
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# 15us < tPDH < 60us 2us <= tPDH < 6us
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# 60us < tPDL < 240us 8us <= tPDL < 24us
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#
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# In the diagrams below, R is driven by the resistor pullup, M is driven by
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# the master, and S is driven by the slave / target.
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#
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# All of these methods are expected to be called from the "network"/bus layer
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# for doing its operations. See 1wn_if.m for those.
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#
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# Note: This is the polling / busy-wait interface. An interrupt-based interface
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# may be different. But an interrupt-based, non-blocking interface can be tricky.
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#
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# Only the owbus should talk to this interface.
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#
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# WRITE-ONE (see above for timings) From Figure 4-1 AN-937
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#
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# |<---------tSLOT---->|<-tREC->|
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# High RRRRM | RRRRRRRRRRRR|RRRRRRRRM
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# M | R | | | M
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# M| R | | | M
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# Low MMMMMMM | | | MMMMMM...
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# |<-tLOW1->| | |
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# |<------15us--->| |
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# |<--------60us---->|
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#
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#
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METHOD int write_one {
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device_t lldev; /* Link Level device (eg bridge) */
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struct ow_timing *timing; /* timing values */
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};
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# WRITE-ZERO (see above for timings) From Figure 4-2 AN-937
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#
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# |<---------tSLOT------>|<-tREC->|
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# High RRRRM | | |RRRRRRRM
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# M | | R M
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# M| | | |R M
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# Low MMMMMMMMMMMMMMMMMMMMMR MMMMMM...
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# |<--15us->| | |
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# |<------60us--->| |
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# |<-------tLOW0------>|
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#
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#
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METHOD int write_zero {
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device_t lldev; /* Link Level device (eg bridge) */
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struct ow_timing *timing; /* timing values */
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};
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# READ-DATA (see above for timings) From Figure 4-3 AN-937
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#
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# |<---------tSLOT------>|<-tREC->|
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# High RRRRM | rrrrrrrrrrrrrrrRRRRRRRM
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# M | r | R M
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# M| r | |R M
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# Low MMMMMMMSSSSSSSSSSSSSSR MMMMMM...
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# |<tLOWR>< sample > |
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# |<------tRDV---->| |
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# ->| |<-tRELEASE
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#
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# r -- allowed to pull high via the resistor when slave writes a 1-bit
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#
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METHOD int read_data {
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device_t lldev; /* Link Level device (eg bridge) */
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struct ow_timing *timing; /* timing values */
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int *bit; /* Bit we sampled */
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};
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# RESET AND PRESENCE PULSE (see above for timings) From Figure 4-4 AN-937
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#
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# |<---------tRSTH------------>|
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# High RRRM | | RRRRRRRS | RRRR RRM
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# M | |R| |S | R M
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# M| R | | S |R M
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# Low MMMMMMMM MMMMMM| | | SSSSSSSSSS MMMMMM
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# |<----tRSTL--->| | |<-tPDL---->|
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# | ->| |<-tR | |
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# |<tPDH>|
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#
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# Note: for Regular Speed operations, tRSTL + tR should be less than 960us to
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# avoid interfering with other devives on the bus.
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#
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# Returns errors associating with acquiring the bus, or EIO to indicate
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# that the bus was low during the RRRR time where it should have been
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# pulled high. The present field is always updated, even on error.
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#
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METHOD int reset_and_presence {
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device_t lldev; /* Link level device (eg bridge) */
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struct ow_timing *timing; /* timing values */
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int *present; /* 0 = slave 1 = no slave -1 = bus error */
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};
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