f6f7bec6f8
I'll have to go double check to see if it does indeed pass ARP frames between switch ports with this disabled, but it seems required for the CPU port to see ARP traffic. I'll dig into this some more.
235 lines
6.5 KiB
C
235 lines
6.5 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2011-2012 Stefan Bethke.
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* Copyright (c) 2013 Adrian Chadd <adrian@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/errno.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <machine/bus.h>
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#include <dev/iicbus/iic.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mdio/mdio.h>
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#include <dev/etherswitch/etherswitch.h>
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#include <dev/etherswitch/arswitch/arswitchreg.h>
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#include <dev/etherswitch/arswitch/arswitchvar.h>
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#include <dev/etherswitch/arswitch/arswitch_reg.h>
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#include <dev/etherswitch/arswitch/arswitch_phy.h> /* XXX for probe */
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#include <dev/etherswitch/arswitch/arswitch_9340.h>
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#include "mdio_if.h"
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#include "miibus_if.h"
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#include "etherswitch_if.h"
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/*
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* AR9340 specific functions
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*/
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static int
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ar9340_hw_setup(struct arswitch_softc *sc)
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{
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return (0);
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}
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static int
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ar9340_atu_learn_default(struct arswitch_softc *sc)
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{
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/* Enable aging, MAC replacing */
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arswitch_writereg(sc->sc_dev, AR934X_REG_AT_CTRL,
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0x2b /* 5 min age time */ |
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AR934X_AT_CTRL_AGE_EN |
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AR934X_AT_CTRL_LEARN_CHANGE);
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/* Enable ARP frame acknowledge */
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arswitch_modifyreg(sc->sc_dev, AR934X_REG_QM_CTRL,
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AR934X_QM_CTRL_ARP_EN, AR934X_QM_CTRL_ARP_EN);
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#if 0
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/* Copy frame to CPU port, not just redirect it */
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arswitch_modifyreg(sc->sc_dev, AR934X_REG_QM_CTRL,
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AR934X_QM_CTRL_ARP_COPY_EN, AR934X_QM_CTRL_ARP_COPY_EN);
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#endif
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return (0);
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}
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/*
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* Initialise other global values for the AR9340.
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*/
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static int
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ar9340_hw_global_setup(struct arswitch_softc *sc)
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{
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ARSWITCH_LOCK(sc);
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/* Enable CPU port; disable mirror port */
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arswitch_writereg(sc->sc_dev, AR8X16_REG_CPU_PORT,
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AR8X16_CPU_PORT_EN | AR8X16_CPU_MIRROR_DIS);
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/* Setup TAG priority mapping */
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arswitch_writereg(sc->sc_dev, AR8X16_REG_TAG_PRIO, 0xfa50);
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/* Enable Broadcast frames transmitted to the CPU */
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arswitch_modifyreg(sc->sc_dev, AR934X_REG_FLOOD_MASK,
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AR934X_FLOOD_MASK_BC_DP(0),
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AR934X_FLOOD_MASK_BC_DP(0));
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arswitch_modifyreg(sc->sc_dev, AR934X_REG_FLOOD_MASK,
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AR934X_FLOOD_MASK_MC_DP(0),
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AR934X_FLOOD_MASK_MC_DP(0));
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#if 0
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arswitch_modifyreg(sc->sc_dev, AR934X_REG_FLOOD_MASK,
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AR934X_FLOOD_MASK_UC_DP(0),
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AR934X_FLOOD_MASK_UC_DP(0));
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#endif
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/* Enable MIB counters */
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arswitch_modifyreg(sc->sc_dev, AR8X16_REG_MIB_FUNC0,
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AR934X_MIB_ENABLE, AR934X_MIB_ENABLE);
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/* Setup MTU */
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arswitch_modifyreg(sc->sc_dev, AR8X16_REG_GLOBAL_CTRL,
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AR7240_GLOBAL_CTRL_MTU_MASK,
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SM(1536, AR7240_GLOBAL_CTRL_MTU_MASK));
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/* Service Tag */
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arswitch_modifyreg(sc->sc_dev, AR8X16_REG_SERVICE_TAG,
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AR8X16_SERVICE_TAG_MASK, 0);
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/* Settle time */
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DELAY(1000);
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/*
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* Check PHY mode bits.
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*
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* This dictates whether the connected port is to be wired
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* up via GMII or MII. I'm not sure why - this is an internal
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* wiring issue.
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*/
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if (sc->is_gmii) {
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device_printf(sc->sc_dev, "%s: GMII\n", __func__);
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arswitch_modifyreg(sc->sc_dev, AR934X_REG_OPER_MODE0,
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AR934X_OPER_MODE0_MAC_GMII_EN,
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AR934X_OPER_MODE0_MAC_GMII_EN);
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} else if (sc->is_mii) {
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device_printf(sc->sc_dev, "%s: MII\n", __func__);
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arswitch_modifyreg(sc->sc_dev, AR934X_REG_OPER_MODE0,
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AR934X_OPER_MODE0_PHY_MII_EN,
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AR934X_OPER_MODE0_PHY_MII_EN);
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} else {
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device_printf(sc->sc_dev, "%s: need is_gmii or is_mii set\n",
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__func__);
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ARSWITCH_UNLOCK(sc);
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return (ENXIO);
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}
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/*
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* Whether to connect PHY 4 via MII (ie a switch port) or
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* treat it as a CPU port.
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*/
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if (sc->phy4cpu) {
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device_printf(sc->sc_dev, "%s: PHY4 - CPU\n", __func__);
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arswitch_modifyreg(sc->sc_dev, AR934X_REG_OPER_MODE1,
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AR934X_REG_OPER_MODE1_PHY4_MII_EN,
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AR934X_REG_OPER_MODE1_PHY4_MII_EN);
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sc->info.es_nports = 5;
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} else {
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device_printf(sc->sc_dev, "%s: PHY4 - Local\n", __func__);
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sc->info.es_nports = 6;
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}
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/* Settle time */
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DELAY(1000);
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ARSWITCH_UNLOCK(sc);
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return (0);
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}
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/*
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* The AR9340 switch probes (almost) the same as the AR7240 on-chip switch.
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*
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* However, the support is slightly different.
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*
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* So instead of checking the PHY revision or mask register contents,
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* we simply fall back to a hint check.
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*/
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int
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ar9340_probe(device_t dev)
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{
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int is_9340 = 0;
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if (resource_int_value(device_get_name(dev), device_get_unit(dev),
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"is_9340", &is_9340) != 0)
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return (ENXIO);
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if (is_9340 == 0)
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return (ENXIO);
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return (0);
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}
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void
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ar9340_attach(struct arswitch_softc *sc)
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{
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sc->hal.arswitch_hw_setup = ar9340_hw_setup;
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sc->hal.arswitch_hw_global_setup = ar9340_hw_global_setup;
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sc->hal.arswitch_atu_learn_default = ar9340_atu_learn_default;
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/*
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* Note: the ar9340 table fetch code/registers matche
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* the ar8216/ar8316 for now because we're not supporting
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* static entry programming that includes any of the extra
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* bits in the AR9340.
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*/
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/* Set the switch vlan capabilities. */
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sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q |
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ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOUBLE_TAG;
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sc->info.es_nvlangroups = AR8X16_MAX_VLANS;
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}
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