733b92779e
- Device configuration via plain text config file. Also able to operate
when not attached to the chip as the master driver.
- Generic "work request" queue that serves as the base for both ctrl and
ofld tx queues.
- Generic interrupt handler routine that can process any event on any
kind of ingress queue (via a dispatch table).
- A couple of new driver ioctls. cxgbetool can now install a firmware
to the card ("loadfw" command) and can read the card's memory
("memdump" and "tcb" commands).
- Lots of assorted information within dev.t4nex.X.misc.* This is
primarily for debugging and won't show up in sysctl -a.
- Code to manage the L2 tables on the chip.
- Updates to cxgbe(4) man page to go with the tunables that have changed.
- Updates to the shared code in common/
- Updates to the driver-firmware interface (now at fw 1.4.16.0)
MFC after: 1 month
156 lines
4.4 KiB
C
156 lines
4.4 KiB
C
/*-
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* Copyright (c) 2010 Chelsio Communications, Inc.
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* All rights reserved.
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* Written by: Navdeep Parhar <np@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*
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*/
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#ifndef __CXGBE_OSDEP_H_
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#define __CXGBE_OSDEP_H_
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#include <sys/cdefs.h>
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#include <sys/ctype.h>
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/endian.h>
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <dev/pci/pcireg.h>
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#define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__)
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#define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__)
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#define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__)
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#define CH_WARN_RATELIMIT(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__)
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typedef int8_t s8;
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typedef int16_t s16;
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typedef int32_t s32;
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typedef int64_t s64;
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typedef uint8_t u8;
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typedef uint16_t u16;
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typedef uint32_t u32;
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typedef uint64_t u64;
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typedef uint8_t __u8;
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typedef uint16_t __u16;
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typedef uint32_t __u32;
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typedef uint64_t __u64;
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typedef uint8_t __be8;
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typedef uint16_t __be16;
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typedef uint32_t __be32;
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typedef uint64_t __be64;
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#if BYTE_ORDER == BIG_ENDIAN
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#define __BIG_ENDIAN_BITFIELD
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#elif BYTE_ORDER == LITTLE_ENDIAN
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#define __LITTLE_ENDIAN_BITFIELD
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#else
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#error "Must set BYTE_ORDER"
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#endif
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#ifndef __bool_true_false_are_defined
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typedef boolean_t bool;
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#define false FALSE
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#define true TRUE
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#endif
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#define mdelay(x) DELAY((x) * 1000)
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#define udelay(x) DELAY(x)
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#define __devinit
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#define simple_strtoul strtoul
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#define DIV_ROUND_UP(x, y) howmany(x, y)
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
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#define container_of(p, s, f) ((s *)(((uint8_t *)(p)) - offsetof(s, f)))
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#define swab16(x) bswap16(x)
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#define swab32(x) bswap32(x)
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#define swab64(x) bswap64(x)
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#define le16_to_cpu(x) le16toh(x)
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#define le32_to_cpu(x) le32toh(x)
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#define le64_to_cpu(x) le64toh(x)
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#define cpu_to_le16(x) htole16(x)
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#define cpu_to_le32(x) htole32(x)
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#define cpu_to_le64(x) htole64(x)
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#define be16_to_cpu(x) be16toh(x)
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#define be32_to_cpu(x) be32toh(x)
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#define be64_to_cpu(x) be64toh(x)
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#define cpu_to_be16(x) htobe16(x)
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#define cpu_to_be32(x) htobe32(x)
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#define cpu_to_be64(x) htobe64(x)
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#define SPEED_10 10
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#define SPEED_100 100
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#define SPEED_1000 1000
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#define SPEED_10000 10000
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#define DUPLEX_HALF 0
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#define DUPLEX_FULL 1
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#define AUTONEG_DISABLE 0
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#define AUTONEG_ENABLE 1
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#define PCI_CAP_ID_VPD PCIY_VPD
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#define PCI_VPD_ADDR PCIR_VPD_ADDR
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#define PCI_VPD_ADDR_F 0x8000
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#define PCI_VPD_DATA PCIR_VPD_DATA
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#define PCI_CAP_ID_EXP PCIY_EXPRESS
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#define PCI_EXP_DEVCTL PCIR_EXPRESS_DEVICE_CTL
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#define PCI_EXP_DEVCTL_PAYLOAD PCIM_EXP_CTL_MAX_PAYLOAD
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#define PCI_EXP_DEVCTL_READRQ PCIM_EXP_CTL_MAX_READ_REQUEST
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#define PCI_EXP_LNKCTL PCIR_EXPRESS_LINK_CTL
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#define PCI_EXP_LNKSTA PCIR_EXPRESS_LINK_STA
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#define PCI_EXP_LNKSTA_CLS PCIM_LINK_STA_SPEED
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#define PCI_EXP_LNKSTA_NLW PCIM_LINK_STA_WIDTH
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#define PCI_EXP_DEVCTL2 0x28
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static inline int
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ilog2(long x)
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{
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KASSERT(x > 0 && powerof2(x), ("%s: invalid arg %ld", __func__, x));
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return (flsl(x) - 1);
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}
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static inline char *
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strstrip(char *s)
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{
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char c, *r, *trim_at;
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while (isspace(*s))
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s++;
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r = trim_at = s;
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while ((c = *s++) != 0) {
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if (!isspace(c))
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trim_at = s;
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}
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*trim_at = 0;
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return (r);
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}
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#endif
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