e67f80fd20
o ixp425 support o NPE network driver (requires Intel microcode) o h/w qmgr support o True IDE compact flash over expansion bus o pci (ath and hifn795x parts tested) o xscale watchdog timer o ds1672 RTC on i2c bus o ad7418 voltage + temp monitoring on i2c bus o uart Work done together with cognet, kevlo, and jmg. Parts of the ixp425 support obtaine/derived from netbsd. Reviewed by: cognet, imp MFC after: 1 month
143 lines
3.3 KiB
ArmAsm
143 lines
3.3 KiB
ArmAsm
/* $NetBSD: ixp425_a4x_io.S,v 1.2 2005/12/11 12:16:51 christos Exp $ */
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/*
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* Copyright 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* There are simple bus space functions for IO registers mapped at
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* 32-bit aligned positions. offset is multiplied by 4.
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*
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* Based loosely on pxa2x0_a2x_io.S
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*/
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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/*
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* bus_space I/O functions with offset*4
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*/
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/*
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* Read single
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*/
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ENTRY(a4x_bs_r_1)
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ldr r0, [r1, r2, LSL #2]
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and r0, r0, #0xff
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mov pc, lr
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ENTRY(a4x_bs_r_2)
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ldr r0, [r1, r2, LSL #2]
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mov r1, #0xff
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orr r1, r1, r1, lsl #8
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and r0, r0, r1
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mov pc, lr
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ENTRY(a4x_bs_r_4)
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ldr r0, [r1, r2, LSL #2]
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mov pc, lr
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/*
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* Write single
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*/
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ENTRY(a4x_bs_w_1)
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and r3, r3, #0xff
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str r3, [r1, r2, LSL #2]
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mov pc, lr
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ENTRY(a4x_bs_w_2)
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mov r0, #0xff
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orr r0, r0, r0, lsl #8
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and r3, r3, r0
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str r3, [r1, r2, LSL #2]
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mov pc, lr
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ENTRY(a4x_bs_w_4)
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str r3, [r1, r2, LSL #2]
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mov pc, lr
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/*
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* Read multiple
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*/
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ENTRY(a4x_bs_rm_1)
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add r0, r1, r2, lsl #2
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ldr r2, [sp, #0]
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mov r1, r3
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teq r2, #0
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moveq pc, lr
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1: ldr r3, [r0]
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subs r2, r2, #1
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strb r3, [r1], #1
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bne 1b
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mov pc, lr
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ENTRY(a4x_bs_rm_2)
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add r0, r1, r2, lsl #2
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ldr r2, [sp, #0]
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mov r1, r3
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teq r2, #0
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moveq pc, lr
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1: ldr r3, [r0]
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subs r2, r2, #1
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strh r3, [r1], #2
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bne 1b
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mov pc, lr
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/*
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* Write multiple
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*/
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ENTRY(a4x_bs_wm_1)
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add r0, r1, r2, lsl #2
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ldr r2, [sp, #0]
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mov r1, r3
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teq r2, #0
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moveq pc, lr
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1: ldrb r3, [r1], #1
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subs r2, r2, #1
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str r3, [r0]
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bne 1b
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mov pc, lr
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ENTRY(a4x_bs_wm_2)
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add r0, r1, r2, lsl #2
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ldr r2, [sp, #0]
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mov r1, r3
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teq r2, #0
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moveq pc, lr
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1: ldrh r3, [r1], #2
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subs r2, r2, #1
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str r3, [r0]
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bne 1b
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mov pc, lr
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