cfc8861b06
- Put all clock and control unit driver in BUS_PASS_RESOURCE except for the DE2 CCU as it needs the main CCU to be available. - Use BUS_PASS_CPU for a20_cpu_cfg as it makes more sense. - For aw_syscon use SCHEDULER pass as we need it early for drivers that attach in BUS_PASS_SUPPORTDEV - For the rest we can use BUS_PASS_SUPPORTDEV
167 lines
4.8 KiB
C
167 lines
4.8 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <dev/fdt/simplebus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "opt_soc.h"
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#include <dev/extres/clk/clk_div.h>
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#include <dev/extres/clk/clk_fixed.h>
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#include <dev/extres/clk/clk_mux.h>
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#include <arm/allwinner/clkng/aw_ccung.h>
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#include <gnu/dts/include/dt-bindings/clock/sun8i-de2.h>
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#include <gnu/dts/include/dt-bindings/reset/sun8i-de2.h>
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/* Non exported clocks */
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#define CLK_MIXER0_DIV 3
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#define CLK_MIXER1_DIV 4
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#define CLK_WB_DIV 5
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static struct aw_ccung_reset de2_ccu_resets[] = {
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CCU_RESET(RST_MIXER0, 0x08, 0)
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CCU_RESET(RST_MIXER1, 0x08, 1)
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CCU_RESET(RST_WB, 0x08, 2)
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};
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static struct aw_ccung_gate de2_ccu_gates[] = {
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CCU_GATE(CLK_BUS_MIXER0, "mixer0", "mixer0-div", 0x00, 0)
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CCU_GATE(CLK_BUS_MIXER1, "mixer1", "mixer1-div", 0x00, 1)
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CCU_GATE(CLK_BUS_WB, "wb", "wb-div", 0x00, 2)
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CCU_GATE(CLK_MIXER0, "bus-mixer0", "bus-de", 0x04, 0)
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CCU_GATE(CLK_MIXER1, "bus-mixer1", "bus-de", 0x04, 1)
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CCU_GATE(CLK_WB, "bus-wb", "bus-de", 0x04, 2)
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};
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static const char *div_parents[] = {"de"};
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NM_CLK(mixer0_div_clk,
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CLK_MIXER0_DIV, /* id */
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"mixer0-div", div_parents, /* names, parents */
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0x0C, /* offset */
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0, 0, 1, AW_CLK_FACTOR_FIXED, /* N factor (fake)*/
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0, 4, 0, 0, /* M flags */
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0, 0, /* mux */
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0, /* gate */
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AW_CLK_SCALE_CHANGE); /* flags */
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NM_CLK(mixer1_div_clk,
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CLK_MIXER1_DIV, /* id */
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"mixer1-div", div_parents, /* names, parents */
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0x0C, /* offset */
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0, 0, 1, AW_CLK_FACTOR_FIXED, /* N factor (fake)*/
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4, 4, 0, 0, /* M flags */
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0, 0, /* mux */
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0, /* gate */
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AW_CLK_SCALE_CHANGE); /* flags */
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NM_CLK(wb_div_clk,
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CLK_WB_DIV, /* id */
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"wb-div", div_parents, /* names, parents */
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0x0C, /* offset */
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0, 0, 1, AW_CLK_FACTOR_FIXED, /* N factor (fake)*/
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8, 4, 0, 0, /* M flags */
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0, 0, /* mux */
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0, /* gate */
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AW_CLK_SCALE_CHANGE); /* flags */
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static struct aw_ccung_clk de2_ccu_clks[] = {
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{ .type = AW_CLK_NM, .clk.nm = &mixer0_div_clk},
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{ .type = AW_CLK_NM, .clk.nm = &mixer1_div_clk},
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{ .type = AW_CLK_NM, .clk.nm = &wb_div_clk},
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};
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static struct ofw_compat_data compat_data[] = {
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{"allwinner,sun50i-a64-de2-clk", 1},
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{NULL, 0}
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};
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static int
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ccu_de2_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Allwinner DE2 Clock Control Unit");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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ccu_de2_attach(device_t dev)
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{
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struct aw_ccung_softc *sc;
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sc = device_get_softc(dev);
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sc->resets = de2_ccu_resets;
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sc->nresets = nitems(de2_ccu_resets);
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sc->gates = de2_ccu_gates;
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sc->ngates = nitems(de2_ccu_gates);
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sc->clks = de2_ccu_clks;
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sc->nclks = nitems(de2_ccu_clks);
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return (aw_ccung_attach(dev));
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}
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static device_method_t ccu_de2_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ccu_de2_probe),
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DEVMETHOD(device_attach, ccu_de2_attach),
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DEVMETHOD_END
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};
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static devclass_t ccu_de2ng_devclass;
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DEFINE_CLASS_1(ccu_de2, ccu_de2_driver, ccu_de2_methods,
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sizeof(struct aw_ccung_softc), aw_ccung_driver);
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EARLY_DRIVER_MODULE(ccu_de2, simplebus, ccu_de2_driver,
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ccu_de2ng_devclass, 0, 0, BUS_PASS_RESOURCE + BUS_PASS_ORDER_LAST);
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