cb6b8299fd
Refresh upstream driver before impending conversion to iflib. Major new features: - Support for Fortville-based 25G adapters - Support for I2C reads/writes (To prevent getting or sending corrupt data, you should set dev.ixl.0.debug.disable_fw_link_management=1 when using I2C [this will disable link!], then set it to 0 when done. The driver implements the SIOCGI2C ioctl, so ifconfig -v works for reading I2C data, but there are read_i2c and write_i2c sysctls under the .debug sysctl tree [the latter being useful for upper page support in QSFP+]). - Addition of an iWARP client interface (so the future iWARP driver for X722 devices can communicate with the base driver). - Compiling this option in is enabled by default, with "options IXL_IW" in GENERIC. Differential Revision: https://reviews.freebsd.org/D9227 Reviewed by: sbruno MFC after: 2 weeks Sponsored by: Intel Corporation
243 lines
7.0 KiB
C
243 lines
7.0 KiB
C
/******************************************************************************
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Copyright (c) 2013-2015, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#ifndef _I40E_OSDEP_H_
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#define _I40E_OSDEP_H_
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/endian.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/clock.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#define i40e_usec_delay(x) DELAY(x)
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#define i40e_msec_delay(x) DELAY(1000 * (x))
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#define DBG 0
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#define MSGOUT(S, A, B) printf(S "\n", A, B)
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#define DEBUGFUNC(F) DEBUGOUT(F);
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#if DBG
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#define DEBUGOUT(S) printf(S "\n")
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#define DEBUGOUT1(S,A) printf(S "\n",A)
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#define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
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#define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
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#define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
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#else
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#define DEBUGOUT(S)
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#define DEBUGOUT1(S,A)
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#define DEBUGOUT2(S,A,B)
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#define DEBUGOUT3(S,A,B,C)
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#define DEBUGOUT6(S,A,B,C,D,E,F)
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#define DEBUGOUT7(S,A,B,C,D,E,F,G)
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#endif
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/* Remove unused shared code macros */
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#define UNREFERENCED_PARAMETER(_p)
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#define UNREFERENCED_1PARAMETER(_p)
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#define UNREFERENCED_2PARAMETER(_p, _q)
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#define UNREFERENCED_3PARAMETER(_p, _q, _r)
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#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
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#define UNREFERENCED_5PARAMETER(_p, _q, _r, _s, _t)
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#define STATIC static
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#define INLINE inline
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#define FALSE 0
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#define false 0 /* shared code requires this */
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#define TRUE 1
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#define true 1
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#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
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#define PCI_COMMAND_REGISTER PCIR_COMMAND
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
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#define i40e_memset(a, b, c, d) memset((a), (b), (c))
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#define i40e_memcpy(a, b, c, d) memcpy((a), (b), (c))
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#define CPU_TO_LE16(o) htole16(o)
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#define CPU_TO_LE32(s) htole32(s)
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#define CPU_TO_LE64(h) htole64(h)
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#define LE16_TO_CPU(a) le16toh(a)
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#define LE32_TO_CPU(c) le32toh(c)
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#define LE64_TO_CPU(k) le64toh(k)
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#define I40E_NTOHS(a) ntohs(a)
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#define I40E_NTOHL(a) ntohl(a)
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#define I40E_HTONS(a) htons(a)
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#define I40E_HTONL(a) htonl(a)
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#define FIELD_SIZEOF(x, y) (sizeof(((x*)0)->y))
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typedef uint8_t u8;
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typedef int8_t s8;
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typedef uint16_t u16;
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typedef int16_t s16;
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typedef uint32_t u32;
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typedef int32_t s32;
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typedef uint64_t u64;
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/* long string relief */
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typedef enum i40e_status_code i40e_status;
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#define __le16 u16
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#define __le32 u32
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#define __le64 u64
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#define __be16 u16
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#define __be32 u32
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#define __be64 u64
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/* SW spinlock */
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struct i40e_spinlock {
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struct mtx mutex;
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};
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#define le16_to_cpu
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#if defined(__amd64__) || defined(i386)
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static __inline
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void prefetch(void *x)
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{
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__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
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}
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#else
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#define prefetch(x)
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#endif
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struct i40e_osdep {
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bus_space_tag_t mem_bus_space_tag;
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bus_space_handle_t mem_bus_space_handle;
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bus_size_t mem_bus_space_size;
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uint32_t flush_reg;
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int i2c_intfc_num;
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device_t dev;
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};
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struct i40e_dma_mem {
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void *va;
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u64 pa;
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bus_dma_tag_t tag;
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bus_dmamap_t map;
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bus_dma_segment_t seg;
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bus_size_t size;
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int nseg;
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int flags;
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};
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struct i40e_virt_mem {
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void *va;
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u32 size;
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};
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struct i40e_hw; /* forward decl */
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u16 i40e_read_pci_cfg(struct i40e_hw *, u32);
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void i40e_write_pci_cfg(struct i40e_hw *, u32, u16);
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/*
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** i40e_debug - OS dependent version of shared code debug printing
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*/
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enum i40e_debug_mask;
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#define i40e_debug(h, m, s, ...) i40e_debug_shared(h, m, s, ##__VA_ARGS__)
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extern void i40e_debug_shared(struct i40e_hw *hw, enum i40e_debug_mask mask,
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char *fmt_str, ...);
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/* Non-busy-wait that uses kern_yield() */
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void i40e_msec_pause(int);
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const char * ixl_vc_opcode_str(uint16_t op);
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/*
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** This hardware supports either 16 or 32 byte rx descriptors;
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** the driver only uses the 32 byte kind.
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*/
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#define i40e_rx_desc i40e_32byte_rx_desc
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static __inline uint32_t
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rd32_osdep(struct i40e_osdep *osdep, uint32_t reg)
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{
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KASSERT(reg < osdep->mem_bus_space_size,
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("ixl: register offset %#jx too large (max is %#jx)",
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(uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size));
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return (bus_space_read_4(osdep->mem_bus_space_tag,
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osdep->mem_bus_space_handle, reg));
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}
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static __inline void
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wr32_osdep(struct i40e_osdep *osdep, uint32_t reg, uint32_t value)
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{
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KASSERT(reg < osdep->mem_bus_space_size,
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("ixl: register offset %#jx too large (max is %#jx)",
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(uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size));
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bus_space_write_4(osdep->mem_bus_space_tag,
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osdep->mem_bus_space_handle, reg, value);
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}
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static __inline void
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ixl_flush_osdep(struct i40e_osdep *osdep)
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{
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rd32_osdep(osdep, osdep->flush_reg);
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}
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#define rd32(a, reg) rd32_osdep((a)->back, (reg))
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#define wr32(a, reg, value) wr32_osdep((a)->back, (reg), (value))
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#define rd64(a, reg) (\
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bus_space_read_8( ((struct i40e_osdep *)(a)->back)->mem_bus_space_tag, \
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((struct i40e_osdep *)(a)->back)->mem_bus_space_handle, \
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reg))
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#define wr64(a, reg, value) (\
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bus_space_write_8( ((struct i40e_osdep *)(a)->back)->mem_bus_space_tag, \
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((struct i40e_osdep *)(a)->back)->mem_bus_space_handle, \
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reg, value))
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#define ixl_flush(a) ixl_flush_osdep((a)->back)
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#endif /* _I40E_OSDEP_H_ */
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