2e21a3ef7e
is derived from the phrase 'MegaRAID Firmware Interface' used by LSI. This driver provides a block interface to logical disks on the card and a minimal management device. It is MPSAFE, INTR_FAST, and 64-bit capable. Thanks to Dell for providing hardware to test with and IronPort for sponsoring the work. Sponsored by: Dell, Ironport MFC After: 3 days
317 lines
8.9 KiB
C
317 lines
8.9 KiB
C
/*-
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* Copyright (c) 2006 IronPort Systems
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _MFIVAR_H
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#define _MFIVAR_H
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* SCSI structures and definitions are used from here, but no linking
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* requirements are made to CAM.
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*/
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#include <cam/scsi/scsi_all.h>
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struct mfi_hwcomms {
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uint32_t hw_pi;
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uint32_t hw_ci;
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uint32_t hw_reply_q[1];
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};
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struct mfi_softc;
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struct mfi_command {
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TAILQ_ENTRY(mfi_command) cm_link;
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struct mfi_softc *cm_sc;
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union mfi_frame *cm_frame;
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uint32_t cm_frame_busaddr;
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struct mfi_sense *cm_sense;
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uint32_t cm_sense_busaddr;
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bus_dmamap_t cm_dmamap;
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union mfi_sgl *cm_sg;
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void *cm_data;
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int cm_len;
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int cm_total_frame_size;
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int cm_extra_frames;
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int cm_flags;
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#define MFI_CMD_MAPPED (1<<0)
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#define MFI_CMD_DATAIN (1<<1)
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#define MFI_CMD_DATAOUT (1<<2)
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#define MFI_CMD_COMPLETED (1<<3)
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#define MFI_CMD_POLLED (1<<4)
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#define MFI_ON_MFIQ_FREE (1<<5)
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#define MFI_ON_MFIQ_READY (1<<6)
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#define MFI_ON_MFIQ_BUSY (1<<7)
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#define MFI_ON_MFIQ_MASK ((1<<5)|(1<<6)|(1<<7))
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void (* cm_complete)(struct mfi_command *cm);
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void *cm_private;
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};
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struct mfi_ld {
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TAILQ_ENTRY(mfi_ld) ld_link;
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device_t ld_disk;
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uint64_t ld_sectors;
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uint32_t ld_secsize;
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int ld_id;
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};
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struct mfi_softc {
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device_t mfi_dev;
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int mfi_flags;
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#define MFI_FLAGS_SG64 (1<<0)
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#define MFI_FLAGS_QFRZN (1<<1)
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#define MFI_FLAGS_OPEN (1<<2)
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struct mfi_hwcomms *mfi_comms;
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TAILQ_HEAD(,mfi_command) mfi_free;
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TAILQ_HEAD(,mfi_command) mfi_ready;
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TAILQ_HEAD(,mfi_command) mfi_busy;
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struct bio_queue_head mfi_bioq;
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struct mfi_qstat mfi_qstat[MFIQ_COUNT];
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struct resource *mfi_regs_resource;
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bus_space_handle_t mfi_bhandle;
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bus_space_tag_t mfi_btag;
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int mfi_regs_rid;
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bus_dma_tag_t mfi_parent_dmat;
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bus_dma_tag_t mfi_buffer_dmat;
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bus_dma_tag_t mfi_comms_dmat;
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bus_dmamap_t mfi_comms_dmamap;
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uint32_t mfi_comms_busaddr;
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bus_dma_tag_t mfi_frames_dmat;
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bus_dmamap_t mfi_frames_dmamap;
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uint32_t mfi_frames_busaddr;
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union mfi_frame *mfi_frames;
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bus_dma_tag_t mfi_sense_dmat;
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bus_dmamap_t mfi_sense_dmamap;
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uint32_t mfi_sense_busaddr;
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struct mfi_sense *mfi_sense;
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struct resource *mfi_irq;
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void *mfi_intr;
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int mfi_irq_rid;
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struct intr_config_hook mfi_ich;
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eventhandler_tag eh;
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int mfi_probe_count;
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/*
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* Allocation for the command array. Used as an indexable array to
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* recover completed commands.
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*/
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struct mfi_command *mfi_commands;
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/*
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* How many commands were actually allocated
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*/
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int mfi_total_cmds;
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/*
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* How many commands the firmware can handle. Also how big the reply
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* queue is, minus 1.
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*/
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int mfi_max_fw_cmds;
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/*
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* Max number of S/G elements the firmware can handle
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*/
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int mfi_max_fw_sgl;
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/*
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* How many S/G elements we'll ever actually use
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*/
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int mfi_total_sgl;
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/*
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* How many bytes a compound frame is, including all of the extra frames
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* that are used for S/G elements.
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*/
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int mfi_frame_size;
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/*
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* How large an S/G element is. Used to calculate the number of single
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* frames in a command.
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*/
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int mfi_sgsize;
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/*
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* Max number of sectors that the firmware allows
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*/
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uint32_t mfi_max_io;
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TAILQ_HEAD(,mfi_ld) mfi_ld_tqh;
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eventhandler_tag mfi_eh;
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struct cdev *mfi_cdev;
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struct mtx mfi_io_lock;
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};
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extern int mfi_attach(struct mfi_softc *);
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extern void mfi_free(struct mfi_softc *);
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extern int mfi_shutdown(struct mfi_softc *);
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extern void mfi_startio(struct mfi_softc *);
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extern void mfi_disk_complete(struct bio *);
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extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int);
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#define MFIQ_ADD(sc, qname) \
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do { \
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struct mfi_qstat *qs; \
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\
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qs = &(sc)->mfi_qstat[qname]; \
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qs->q_length++; \
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if (qs->q_length > qs->q_max) \
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qs->q_max = qs->q_length; \
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} while (0)
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#define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length--
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#define MFIQ_INIT(sc, qname) \
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do { \
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sc->mfi_qstat[qname].q_length = 0; \
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sc->mfi_qstat[qname].q_max = 0; \
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} while (0)
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#define MFIQ_COMMAND_QUEUE(name, index) \
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static __inline void \
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mfi_initq_ ## name (struct mfi_softc *sc) \
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{ \
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TAILQ_INIT(&sc->mfi_ ## name); \
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MFIQ_INIT(sc, index); \
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} \
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static __inline void \
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mfi_enqueue_ ## name (struct mfi_command *cm) \
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{ \
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if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \
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printf("command %p is on another queue, " \
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"flags = %#x\n", cm, cm->cm_flags); \
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panic("command is on another queue"); \
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} \
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TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
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cm->cm_flags |= MFI_ON_ ## index; \
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MFIQ_ADD(cm->cm_sc, index); \
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} \
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static __inline void \
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mfi_requeue_ ## name (struct mfi_command *cm) \
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{ \
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if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \
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printf("command %p is on another queue, " \
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"flags = %#x\n", cm, cm->cm_flags); \
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panic("command is on another queue"); \
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} \
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TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
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cm->cm_flags |= MFI_ON_ ## index; \
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MFIQ_ADD(cm->cm_sc, index); \
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} \
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static __inline struct mfi_command * \
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mfi_dequeue_ ## name (struct mfi_softc *sc) \
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{ \
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struct mfi_command *cm; \
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\
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if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \
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if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \
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printf("command %p not in queue, " \
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"flags = %#x, bit = %#x\n", cm, \
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cm->cm_flags, MFI_ON_ ## index); \
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panic("command not in queue"); \
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} \
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TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \
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cm->cm_flags &= ~MFI_ON_ ## index; \
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MFIQ_REMOVE(sc, index); \
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} \
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return (cm); \
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} \
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static __inline void \
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mfi_remove_ ## name (struct mfi_command *cm) \
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{ \
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if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \
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printf("command %p not in queue, flags = %#x, " \
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"bit = %#x\n", cm, cm->cm_flags, \
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MFI_ON_ ## index); \
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panic("command not in queue"); \
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} \
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TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
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cm->cm_flags &= ~MFI_ON_ ## index; \
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MFIQ_REMOVE(cm->cm_sc, index); \
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} \
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struct hack
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MFIQ_COMMAND_QUEUE(free, MFIQ_FREE);
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MFIQ_COMMAND_QUEUE(ready, MFIQ_READY);
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MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY);
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static __inline void
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mfi_initq_bio(struct mfi_softc *sc)
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{
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bioq_init(&sc->mfi_bioq);
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MFIQ_INIT(sc, MFIQ_BIO);
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}
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static __inline void
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mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp)
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{
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bioq_insert_tail(&sc->mfi_bioq, bp);
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MFIQ_ADD(sc, MFIQ_BIO);
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}
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static __inline struct bio *
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mfi_dequeue_bio(struct mfi_softc *sc)
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{
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struct bio *bp;
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if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) {
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bioq_remove(&sc->mfi_bioq, bp);
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MFIQ_REMOVE(sc, MFIQ_BIO);
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}
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return (bp);
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}
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static __inline void
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mfi_print_sense(struct mfi_softc *sc, void *sense)
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{
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int error, key, asc, ascq;
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scsi_extract_sense((struct scsi_sense_data *)sense,
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&error, &key, &asc, &ascq);
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device_printf(sc->mfi_dev, "sense error %d, sense_key %d, "
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"asc %d, ascq %d\n", error, key, asc, ascq);
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}
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#define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \
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sc->mfi_bhandle, (reg), (val))
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#define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \
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(sc)->mfi_bhandle, (reg))
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#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \
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sc->mfi_bhandle, (reg), (val))
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#define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \
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(sc)->mfi_bhandle, (reg))
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#define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \
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sc->mfi_bhandle, (reg), (val))
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#define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \
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(sc)->mfi_bhandle, (reg))
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MALLOC_DECLARE(M_MFIBUF);
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#endif /* _MFIVAR_H */
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