281 lines
10 KiB
C++
281 lines
10 KiB
C++
//===-- MachineSink.cpp - Sinking for machine instructions ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass moves instructions into successor blocks, when possible, so that
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// they aren't executed on paths where their results aren't needed.
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//
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// This pass is not intended to be a replacement or a complete alternative
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// for an LLVM-IR-level sinking pass. It is only designed to sink simple
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// constructs that are not exposed before lowering and instruction selection.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "machine-sink"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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STATISTIC(NumSunk, "Number of machine instructions sunk");
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namespace {
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class MachineSinking : public MachineFunctionPass {
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const TargetInstrInfo *TII;
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const TargetRegisterInfo *TRI;
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MachineRegisterInfo *RegInfo; // Machine register information
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MachineDominatorTree *DT; // Machine dominator tree
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AliasAnalysis *AA;
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BitVector AllocatableSet; // Which physregs are allocatable?
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public:
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static char ID; // Pass identification
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MachineSinking() : MachineFunctionPass(&ID) {}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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MachineFunctionPass::getAnalysisUsage(AU);
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AU.addRequired<AliasAnalysis>();
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AU.addRequired<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
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}
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private:
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bool ProcessBlock(MachineBasicBlock &MBB);
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bool SinkInstruction(MachineInstr *MI, bool &SawStore);
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bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB) const;
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};
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} // end anonymous namespace
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char MachineSinking::ID = 0;
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static RegisterPass<MachineSinking>
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X("machine-sink", "Machine code sinking");
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FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); }
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/// AllUsesDominatedByBlock - Return true if all uses of the specified register
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/// occur in blocks dominated by the specified block.
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bool MachineSinking::AllUsesDominatedByBlock(unsigned Reg,
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MachineBasicBlock *MBB) const {
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assert(TargetRegisterInfo::isVirtualRegister(Reg) &&
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"Only makes sense for vregs");
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for (MachineRegisterInfo::use_iterator I = RegInfo->use_begin(Reg),
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E = RegInfo->use_end(); I != E; ++I) {
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// Determine the block of the use.
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MachineInstr *UseInst = &*I;
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MachineBasicBlock *UseBlock = UseInst->getParent();
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if (UseInst->getOpcode() == TargetInstrInfo::PHI) {
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// PHI nodes use the operand in the predecessor block, not the block with
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// the PHI.
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UseBlock = UseInst->getOperand(I.getOperandNo()+1).getMBB();
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}
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// Check that it dominates.
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if (!DT->dominates(MBB, UseBlock))
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return false;
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}
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return true;
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}
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bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(dbgs() << "******** Machine Sinking ********\n");
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const TargetMachine &TM = MF.getTarget();
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TII = TM.getInstrInfo();
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TRI = TM.getRegisterInfo();
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RegInfo = &MF.getRegInfo();
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DT = &getAnalysis<MachineDominatorTree>();
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AA = &getAnalysis<AliasAnalysis>();
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AllocatableSet = TRI->getAllocatableSet(MF);
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bool EverMadeChange = false;
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while (1) {
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bool MadeChange = false;
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// Process all basic blocks.
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for (MachineFunction::iterator I = MF.begin(), E = MF.end();
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I != E; ++I)
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MadeChange |= ProcessBlock(*I);
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// If this iteration over the code changed anything, keep iterating.
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if (!MadeChange) break;
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EverMadeChange = true;
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}
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return EverMadeChange;
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}
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bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
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// Can't sink anything out of a block that has less than two successors.
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if (MBB.succ_size() <= 1 || MBB.empty()) return false;
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bool MadeChange = false;
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// Walk the basic block bottom-up. Remember if we saw a store.
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MachineBasicBlock::iterator I = MBB.end();
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--I;
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bool ProcessedBegin, SawStore = false;
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do {
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MachineInstr *MI = I; // The instruction to sink.
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// Predecrement I (if it's not begin) so that it isn't invalidated by
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// sinking.
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ProcessedBegin = I == MBB.begin();
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if (!ProcessedBegin)
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--I;
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if (SinkInstruction(MI, SawStore))
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++NumSunk, MadeChange = true;
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// If we just processed the first instruction in the block, we're done.
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} while (!ProcessedBegin);
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return MadeChange;
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}
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/// SinkInstruction - Determine whether it is safe to sink the specified machine
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/// instruction out of its current block into a successor.
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bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
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// Check if it's safe to move the instruction.
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if (!MI->isSafeToMove(TII, SawStore, AA))
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return false;
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// FIXME: This should include support for sinking instructions within the
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// block they are currently in to shorten the live ranges. We often get
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// instructions sunk into the top of a large block, but it would be better to
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// also sink them down before their first use in the block. This xform has to
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// be careful not to *increase* register pressure though, e.g. sinking
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// "x = y + z" down if it kills y and z would increase the live ranges of y
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// and z and only shrink the live range of x.
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// Loop over all the operands of the specified instruction. If there is
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// anything we can't handle, bail out.
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MachineBasicBlock *ParentBlock = MI->getParent();
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// SuccToSinkTo - This is the successor to sink this instruction to, once we
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// decide.
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MachineBasicBlock *SuccToSinkTo = 0;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isReg()) continue; // Ignore non-register operands.
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unsigned Reg = MO.getReg();
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if (Reg == 0) continue;
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if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
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if (MO.isUse()) {
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// If the physreg has no defs anywhere, it's just an ambient register
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// and we can freely move its uses. Alternatively, if it's allocatable,
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// it could get allocated to something with a def during allocation.
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if (!RegInfo->def_empty(Reg))
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return false;
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if (AllocatableSet.test(Reg))
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return false;
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// Check for a def among the register's aliases too.
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for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) {
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unsigned AliasReg = *Alias;
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if (!RegInfo->def_empty(AliasReg))
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return false;
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if (AllocatableSet.test(AliasReg))
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return false;
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}
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} else if (!MO.isDead()) {
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// A def that isn't dead. We can't move it.
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return false;
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}
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} else {
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// Virtual register uses are always safe to sink.
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if (MO.isUse()) continue;
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// If it's not safe to move defs of the register class, then abort.
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if (!TII->isSafeToMoveRegClassDefs(RegInfo->getRegClass(Reg)))
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return false;
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// FIXME: This picks a successor to sink into based on having one
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// successor that dominates all the uses. However, there are cases where
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// sinking can happen but where the sink point isn't a successor. For
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// example:
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// x = computation
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// if () {} else {}
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// use x
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// the instruction could be sunk over the whole diamond for the
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// if/then/else (or loop, etc), allowing it to be sunk into other blocks
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// after that.
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// Virtual register defs can only be sunk if all their uses are in blocks
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// dominated by one of the successors.
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if (SuccToSinkTo) {
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// If a previous operand picked a block to sink to, then this operand
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// must be sinkable to the same block.
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if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo))
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return false;
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continue;
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}
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// Otherwise, we should look at all the successors and decide which one
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// we should sink to.
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for (MachineBasicBlock::succ_iterator SI = ParentBlock->succ_begin(),
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E = ParentBlock->succ_end(); SI != E; ++SI) {
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if (AllUsesDominatedByBlock(Reg, *SI)) {
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SuccToSinkTo = *SI;
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break;
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}
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}
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// If we couldn't find a block to sink to, ignore this instruction.
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if (SuccToSinkTo == 0)
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return false;
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}
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}
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// If there are no outputs, it must have side-effects.
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if (SuccToSinkTo == 0)
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return false;
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// It's not safe to sink instructions to EH landing pad. Control flow into
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// landing pad is implicitly defined.
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if (SuccToSinkTo->isLandingPad())
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return false;
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// It is not possible to sink an instruction into its own block. This can
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// happen with loops.
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if (MI->getParent() == SuccToSinkTo)
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return false;
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DEBUG(dbgs() << "Sink instr " << *MI);
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DEBUG(dbgs() << "to block " << *SuccToSinkTo);
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// If the block has multiple predecessors, this would introduce computation on
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// a path that it doesn't already exist. We could split the critical edge,
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// but for now we just punt.
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// FIXME: Split critical edges if not backedges.
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if (SuccToSinkTo->pred_size() > 1) {
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DEBUG(dbgs() << " *** PUNTING: Critical edge found\n");
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return false;
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}
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// Determine where to insert into. Skip phi nodes.
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MachineBasicBlock::iterator InsertPos = SuccToSinkTo->begin();
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while (InsertPos != SuccToSinkTo->end() &&
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InsertPos->getOpcode() == TargetInstrInfo::PHI)
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++InsertPos;
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// Move the instruction.
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SuccToSinkTo->splice(InsertPos, ParentBlock, MI,
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++MachineBasicBlock::iterator(MI));
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return true;
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}
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