379663d70b
required for the ABI the kernel is being built for. XXX This is implemented in a kind-of nasty way that involves including source files, but it's still an improvement. o) Retire ISA_* options since they're unused and were always wrong.
708 lines
19 KiB
C
708 lines
19 KiB
C
/*-
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* Copyright (c) 1982, 1986 The Regents of the University of California.
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* Copyright (c) 1989, 1990 William Jolitz
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* Copyright (c) 1994 John Dyson
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department, and William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
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* Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
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* from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota
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* JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_compat.h"
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/syscall.h>
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#include <sys/sysent.h>
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#include <sys/buf.h>
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#include <sys/vnode.h>
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#include <sys/vmmeter.h>
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#include <sys/kernel.h>
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#include <sys/sysctl.h>
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#include <sys/unistd.h>
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#include <machine/asm.h>
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#include <machine/cache.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/md_var.h>
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#include <machine/pcb.h>
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#include <vm/vm.h>
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#include <vm/vm_extern.h>
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#include <vm/pmap.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_map.h>
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#include <vm/vm_page.h>
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#include <vm/vm_pageout.h>
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#include <vm/vm_param.h>
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#include <vm/uma.h>
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#include <vm/uma_int.h>
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#include <sys/user.h>
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#include <sys/mbuf.h>
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#include <sys/sf_buf.h>
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#ifndef NSFBUFS
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#define NSFBUFS (512 + maxusers * 16)
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#endif
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#ifndef __mips_n64
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static void sf_buf_init(void *arg);
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SYSINIT(sock_sf, SI_SUB_MBUF, SI_ORDER_ANY, sf_buf_init, NULL);
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/*
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* Expanded sf_freelist head. Really an SLIST_HEAD() in disguise, with the
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* sf_freelist head with the sf_lock mutex.
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*/
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static struct {
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SLIST_HEAD(, sf_buf) sf_head;
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struct mtx sf_lock;
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} sf_freelist;
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static u_int sf_buf_alloc_want;
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#endif
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/*
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* Finish a fork operation, with process p2 nearly set up.
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* Copy and update the pcb, set up the stack so that the child
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* ready to run and return to user mode.
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*/
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void
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cpu_fork(register struct thread *td1,register struct proc *p2,
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struct thread *td2,int flags)
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{
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register struct proc *p1;
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struct pcb *pcb2;
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p1 = td1->td_proc;
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if ((flags & RFPROC) == 0)
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return;
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/* It is assumed that the vm_thread_alloc called
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* cpu_thread_alloc() before cpu_fork is called.
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*/
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/* Point the pcb to the top of the stack */
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pcb2 = td2->td_pcb;
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/* Copy p1's pcb, note that in this case
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* our pcb also includes the td_frame being copied
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* too. The older mips2 code did an additional copy
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* of the td_frame, for us that's not needed any
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* longer (this copy does them both)
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*/
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bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
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/* Point mdproc and then copy over td1's contents
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* md_proc is empty for MIPS
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*/
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td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED;
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/*
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* Set up return-value registers as fork() libc stub expects.
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*/
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td2->td_frame->v0 = 0;
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td2->td_frame->v1 = 1;
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td2->td_frame->a3 = 0;
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if (td1 == PCPU_GET(fpcurthread))
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MipsSaveCurFPState(td1);
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pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
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/* Make sp 64-bit aligned */
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pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
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~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
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pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
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pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td2;
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pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td2->td_frame;
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pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
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(MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
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/*
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* FREEBSD_DEVELOPERS_FIXME:
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* Setup any other CPU-Specific registers (Not MIPS Standard)
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* and/or bits in other standard MIPS registers (if CPU-Specific)
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* that are needed.
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*/
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td2->td_md.md_tls = td1->td_md.md_tls;
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td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
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td2->td_md.md_spinlock_count = 1;
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#ifdef CPU_CNMIPS
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if (td1->td_md.md_flags & MDTD_COP2USED) {
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if (td1->td_md.md_cop2owner == COP2_OWNER_USERLAND) {
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if (td1->td_md.md_ucop2)
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octeon_cop2_save(td1->td_md.md_ucop2);
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else
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panic("cpu_fork: ucop2 is NULL but COP2 is enabled");
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}
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else {
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if (td1->td_md.md_cop2)
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octeon_cop2_save(td1->td_md.md_cop2);
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else
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panic("cpu_fork: cop2 is NULL but COP2 is enabled");
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}
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}
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if (td1->td_md.md_cop2) {
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td2->td_md.md_cop2 = octeon_cop2_alloc_ctx();
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memcpy(td2->td_md.md_cop2, td1->td_md.md_cop2,
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sizeof(*td1->td_md.md_cop2));
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}
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if (td1->td_md.md_ucop2) {
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td2->td_md.md_ucop2 = octeon_cop2_alloc_ctx();
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memcpy(td2->td_md.md_ucop2, td1->td_md.md_ucop2,
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sizeof(*td1->td_md.md_ucop2));
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}
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td2->td_md.md_cop2owner = td1->td_md.md_cop2owner;
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pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
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/* Clear COP2 bits for userland & kernel */
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td2->td_frame->sr &= ~MIPS_SR_COP_2_BIT;
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pcb2->pcb_context[PCB_REG_SR] &= ~MIPS_SR_COP_2_BIT;
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#endif
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}
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/*
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* Intercept the return address from a freshly forked process that has NOT
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* been scheduled yet.
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*
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* This is needed to make kernel threads stay in kernel mode.
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*/
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void
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cpu_set_fork_handler(struct thread *td, void (*func) __P((void *)), void *arg)
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{
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/*
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* Note that the trap frame follows the args, so the function
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* is really called like this: func(arg, frame);
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*/
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td->td_pcb->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)func;
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td->td_pcb->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)arg;
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}
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void
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cpu_exit(struct thread *td)
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{
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}
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void
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cpu_thread_exit(struct thread *td)
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{
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if (PCPU_GET(fpcurthread) == td)
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PCPU_GET(fpcurthread) = (struct thread *)0;
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#ifdef CPU_CNMIPS
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if (td->td_md.md_cop2)
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memset(td->td_md.md_cop2, 0,
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sizeof(*td->td_md.md_cop2));
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if (td->td_md.md_ucop2)
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memset(td->td_md.md_ucop2, 0,
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sizeof(*td->td_md.md_ucop2));
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#endif
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}
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void
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cpu_thread_free(struct thread *td)
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{
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#ifdef CPU_CNMIPS
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if (td->td_md.md_cop2)
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octeon_cop2_free_ctx(td->td_md.md_cop2);
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if (td->td_md.md_ucop2)
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octeon_cop2_free_ctx(td->td_md.md_ucop2);
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td->td_md.md_cop2 = NULL;
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td->td_md.md_ucop2 = NULL;
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#endif
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}
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void
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cpu_thread_clean(struct thread *td)
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{
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}
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void
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cpu_thread_swapin(struct thread *td)
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{
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pt_entry_t *pte;
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int i;
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/*
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* The kstack may be at a different physical address now.
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* Cache the PTEs for the Kernel stack in the machine dependent
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* part of the thread struct so cpu_switch() can quickly map in
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* the pcb struct and kernel stack.
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*/
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for (i = 0; i < KSTACK_PAGES; i++) {
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pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
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td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
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}
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}
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void
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cpu_thread_swapout(struct thread *td)
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{
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}
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void
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cpu_thread_alloc(struct thread *td)
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{
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pt_entry_t *pte;
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int i;
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KASSERT((td->td_kstack & (1 << PAGE_SHIFT)) == 0, ("kernel stack must be aligned."));
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td->td_pcb = (struct pcb *)(td->td_kstack +
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td->td_kstack_pages * PAGE_SIZE) - 1;
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td->td_frame = &td->td_pcb->pcb_regs;
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for (i = 0; i < KSTACK_PAGES; i++) {
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pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
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td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
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}
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}
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void
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cpu_set_syscall_retval(struct thread *td, int error)
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{
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struct trapframe *locr0 = td->td_frame;
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unsigned int code;
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int quad_syscall;
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code = locr0->v0;
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quad_syscall = 0;
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#if defined(__mips_n32) || defined(__mips_n64)
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#ifdef COMPAT_FREEBSD32
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if (code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32))
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quad_syscall = 1;
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#endif
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#else
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if (code == SYS___syscall)
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quad_syscall = 1;
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#endif
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if (code == SYS_syscall)
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code = locr0->a0;
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else if (code == SYS___syscall) {
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if (quad_syscall)
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code = _QUAD_LOWWORD ? locr0->a1 : locr0->a0;
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else
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code = locr0->a0;
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}
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switch (error) {
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case 0:
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if (quad_syscall && code != SYS_lseek) {
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/*
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* System call invoked through the
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* SYS___syscall interface but the
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* return value is really just 32
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* bits.
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*/
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locr0->v0 = td->td_retval[0];
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if (_QUAD_LOWWORD)
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locr0->v1 = td->td_retval[0];
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locr0->a3 = 0;
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} else {
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locr0->v0 = td->td_retval[0];
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locr0->v1 = td->td_retval[1];
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locr0->a3 = 0;
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}
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break;
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case ERESTART:
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locr0->pc = td->td_pcb->pcb_tpc;
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break;
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case EJUSTRETURN:
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break; /* nothing to do */
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default:
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if (quad_syscall && code != SYS_lseek) {
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locr0->v0 = error;
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if (_QUAD_LOWWORD)
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locr0->v1 = error;
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locr0->a3 = 1;
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} else {
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locr0->v0 = error;
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locr0->a3 = 1;
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}
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}
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}
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/*
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* Initialize machine state (pcb and trap frame) for a new thread about to
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* upcall. Put enough state in the new thread's PCB to get it to go back
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* userret(), where we can intercept it again to set the return (upcall)
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* Address and stack, along with those from upcalls that are from other sources
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* such as those generated in thread_userret() itself.
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*/
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void
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cpu_set_upcall(struct thread *td, struct thread *td0)
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{
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struct pcb *pcb2;
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/* Point the pcb to the top of the stack. */
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pcb2 = td->td_pcb;
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/*
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* Copy the upcall pcb. This loads kernel regs.
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* Those not loaded individually below get their default
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* values here.
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*
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* XXXKSE It might be a good idea to simply skip this as
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* the values of the other registers may be unimportant.
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* This would remove any requirement for knowing the KSE
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* at this time (see the matching comment below for
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* more analysis) (need a good safe default).
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* In MIPS, the trapframe is the first element of the PCB
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* and gets copied when we copy the PCB. No separate copy
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* is needed.
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*/
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bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
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/*
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* Set registers for trampoline to user mode.
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*/
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pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
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/* Make sp 64-bit aligned */
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pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
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~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
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pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
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pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td;
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pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame;
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/* Dont set IE bit in SR. sched lock release will take care of it */
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pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
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(MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
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/*
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* FREEBSD_DEVELOPERS_FIXME:
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* Setup any other CPU-Specific registers (Not MIPS Standard)
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* that are needed.
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*/
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/* SMP Setup to release sched_lock in fork_exit(). */
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td->td_md.md_spinlock_count = 1;
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td->td_md.md_saved_intr = MIPS_SR_INT_IE;
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#if 0
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/* Maybe we need to fix this? */
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td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) |
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(MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
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(MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
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#endif
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}
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/*
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* Set that machine state for performing an upcall that has to
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* be done in thread_userret() so that those upcalls generated
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* in thread_userret() itself can be done as well.
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*/
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void
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cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
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stack_t *stack)
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{
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struct trapframe *tf;
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register_t sp;
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/*
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* At the point where a function is called, sp must be 8
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* byte aligned[for compatibility with 64-bit CPUs]
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* in ``See MIPS Run'' by D. Sweetman, p. 269
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* align stack */
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sp = ((register_t)(intptr_t)(stack->ss_sp + stack->ss_size) & ~0x7) -
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CALLFRAME_SIZ;
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/*
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* Set the trap frame to point at the beginning of the uts
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* function.
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*/
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tf = td->td_frame;
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bzero(tf, sizeof(struct trapframe));
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tf->sp = sp;
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tf->pc = (register_t)(intptr_t)entry;
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/*
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* MIPS ABI requires T9 to be the same as PC
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* in subroutine entry point
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*/
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tf->t9 = (register_t)(intptr_t)entry;
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tf->a0 = (register_t)(intptr_t)arg;
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/*
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* Keep interrupt mask
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*/
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td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
|
|
(mips_rd_status() & MIPS_SR_INT_MASK);
|
|
#if defined(__mips_n32)
|
|
td->td_frame->sr |= MIPS_SR_PX;
|
|
#elif defined(__mips_n64)
|
|
td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
|
|
#endif
|
|
/* tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
|
|
/**XXX the above may now be wrong -- mips2 implements this as panic */
|
|
/*
|
|
* FREEBSD_DEVELOPERS_FIXME:
|
|
* Setup any other CPU-Specific registers (Not MIPS Standard)
|
|
* that are needed.
|
|
*/
|
|
}
|
|
|
|
/*
|
|
* Implement the pre-zeroed page mechanism.
|
|
* This routine is called from the idle loop.
|
|
*/
|
|
|
|
#define ZIDLE_LO(v) ((v) * 2 / 3)
|
|
#define ZIDLE_HI(v) ((v) * 4 / 5)
|
|
|
|
/*
|
|
* Allocate a pool of sf_bufs (sendfile(2) or "super-fast" if you prefer. :-))
|
|
*/
|
|
#ifndef __mips_n64
|
|
static void
|
|
sf_buf_init(void *arg)
|
|
{
|
|
struct sf_buf *sf_bufs;
|
|
vm_offset_t sf_base;
|
|
int i;
|
|
|
|
nsfbufs = NSFBUFS;
|
|
TUNABLE_INT_FETCH("kern.ipc.nsfbufs", &nsfbufs);
|
|
|
|
mtx_init(&sf_freelist.sf_lock, "sf_bufs list lock", NULL, MTX_DEF);
|
|
SLIST_INIT(&sf_freelist.sf_head);
|
|
sf_base = kmem_alloc_nofault(kernel_map, nsfbufs * PAGE_SIZE);
|
|
sf_bufs = malloc(nsfbufs * sizeof(struct sf_buf), M_TEMP,
|
|
M_NOWAIT | M_ZERO);
|
|
for (i = 0; i < nsfbufs; i++) {
|
|
sf_bufs[i].kva = sf_base + i * PAGE_SIZE;
|
|
SLIST_INSERT_HEAD(&sf_freelist.sf_head, &sf_bufs[i], free_list);
|
|
}
|
|
sf_buf_alloc_want = 0;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Get an sf_buf from the freelist. Will block if none are available.
|
|
*/
|
|
struct sf_buf *
|
|
sf_buf_alloc(struct vm_page *m, int flags)
|
|
{
|
|
#ifndef __mips_n64
|
|
struct sf_buf *sf;
|
|
int error;
|
|
|
|
mtx_lock(&sf_freelist.sf_lock);
|
|
while ((sf = SLIST_FIRST(&sf_freelist.sf_head)) == NULL) {
|
|
if (flags & SFB_NOWAIT)
|
|
break;
|
|
sf_buf_alloc_want++;
|
|
mbstat.sf_allocwait++;
|
|
error = msleep(&sf_freelist, &sf_freelist.sf_lock,
|
|
(flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0);
|
|
sf_buf_alloc_want--;
|
|
|
|
/*
|
|
* If we got a signal, don't risk going back to sleep.
|
|
*/
|
|
if (error)
|
|
break;
|
|
}
|
|
if (sf != NULL) {
|
|
SLIST_REMOVE_HEAD(&sf_freelist.sf_head, free_list);
|
|
sf->m = m;
|
|
nsfbufsused++;
|
|
nsfbufspeak = imax(nsfbufspeak, nsfbufsused);
|
|
pmap_qenter(sf->kva, &sf->m, 1);
|
|
}
|
|
mtx_unlock(&sf_freelist.sf_lock);
|
|
return (sf);
|
|
#else
|
|
return ((struct sf_buf *)m);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Release resources back to the system.
|
|
*/
|
|
void
|
|
sf_buf_free(struct sf_buf *sf)
|
|
{
|
|
#ifndef __mips_n64
|
|
pmap_qremove(sf->kva, 1);
|
|
mtx_lock(&sf_freelist.sf_lock);
|
|
SLIST_INSERT_HEAD(&sf_freelist.sf_head, sf, free_list);
|
|
nsfbufsused--;
|
|
if (sf_buf_alloc_want > 0)
|
|
wakeup(&sf_freelist);
|
|
mtx_unlock(&sf_freelist.sf_lock);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Software interrupt handler for queued VM system processing.
|
|
*/
|
|
void
|
|
swi_vm(void *dummy)
|
|
{
|
|
|
|
if (busdma_swi_pending)
|
|
busdma_swi();
|
|
}
|
|
|
|
int
|
|
cpu_set_user_tls(struct thread *td, void *tls_base)
|
|
{
|
|
|
|
td->td_md.md_tls = (char*)tls_base;
|
|
|
|
return (0);
|
|
}
|
|
|
|
#ifdef DDB
|
|
#include <ddb/ddb.h>
|
|
|
|
#define DB_PRINT_REG(ptr, regname) \
|
|
db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->regname))
|
|
|
|
#define DB_PRINT_REG_ARRAY(ptr, arrname, regname) \
|
|
db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->arrname[regname]))
|
|
|
|
static void
|
|
dump_trapframe(struct trapframe *trapframe)
|
|
{
|
|
|
|
db_printf("Trapframe at %p\n", trapframe);
|
|
|
|
DB_PRINT_REG(trapframe, zero);
|
|
DB_PRINT_REG(trapframe, ast);
|
|
DB_PRINT_REG(trapframe, v0);
|
|
DB_PRINT_REG(trapframe, v1);
|
|
DB_PRINT_REG(trapframe, a0);
|
|
DB_PRINT_REG(trapframe, a1);
|
|
DB_PRINT_REG(trapframe, a2);
|
|
DB_PRINT_REG(trapframe, a3);
|
|
DB_PRINT_REG(trapframe, t0);
|
|
DB_PRINT_REG(trapframe, t1);
|
|
DB_PRINT_REG(trapframe, t2);
|
|
DB_PRINT_REG(trapframe, t3);
|
|
DB_PRINT_REG(trapframe, t4);
|
|
DB_PRINT_REG(trapframe, t5);
|
|
DB_PRINT_REG(trapframe, t6);
|
|
DB_PRINT_REG(trapframe, t7);
|
|
DB_PRINT_REG(trapframe, s0);
|
|
DB_PRINT_REG(trapframe, s1);
|
|
DB_PRINT_REG(trapframe, s2);
|
|
DB_PRINT_REG(trapframe, s3);
|
|
DB_PRINT_REG(trapframe, s4);
|
|
DB_PRINT_REG(trapframe, s5);
|
|
DB_PRINT_REG(trapframe, s6);
|
|
DB_PRINT_REG(trapframe, s7);
|
|
DB_PRINT_REG(trapframe, t8);
|
|
DB_PRINT_REG(trapframe, t9);
|
|
DB_PRINT_REG(trapframe, k0);
|
|
DB_PRINT_REG(trapframe, k1);
|
|
DB_PRINT_REG(trapframe, gp);
|
|
DB_PRINT_REG(trapframe, sp);
|
|
DB_PRINT_REG(trapframe, s8);
|
|
DB_PRINT_REG(trapframe, ra);
|
|
DB_PRINT_REG(trapframe, sr);
|
|
DB_PRINT_REG(trapframe, mullo);
|
|
DB_PRINT_REG(trapframe, mulhi);
|
|
DB_PRINT_REG(trapframe, badvaddr);
|
|
DB_PRINT_REG(trapframe, cause);
|
|
DB_PRINT_REG(trapframe, pc);
|
|
}
|
|
|
|
DB_SHOW_COMMAND(pcb, ddb_dump_pcb)
|
|
{
|
|
struct thread *td;
|
|
struct pcb *pcb;
|
|
struct trapframe *trapframe;
|
|
|
|
/* Determine which thread to examine. */
|
|
if (have_addr)
|
|
td = db_lookup_thread(addr, TRUE);
|
|
else
|
|
td = curthread;
|
|
|
|
pcb = td->td_pcb;
|
|
|
|
db_printf("Thread %d at %p\n", td->td_tid, td);
|
|
|
|
db_printf("PCB at %p\n", pcb);
|
|
|
|
trapframe = &pcb->pcb_regs;
|
|
dump_trapframe(trapframe);
|
|
|
|
db_printf("PCB Context:\n");
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S0);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S1);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S2);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S3);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S4);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S5);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S6);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S7);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SP);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S8);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_RA);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SR);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP);
|
|
DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC);
|
|
|
|
db_printf("PCB onfault = %p\n", pcb->pcb_onfault);
|
|
db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr);
|
|
db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count);
|
|
|
|
if (td->td_frame != trapframe) {
|
|
db_printf("td->td_frame %p is not the same as pcb_regs %p\n",
|
|
td->td_frame, trapframe);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Dump the trapframe beginning at address specified by first argument.
|
|
*/
|
|
DB_SHOW_COMMAND(trapframe, ddb_dump_trapframe)
|
|
{
|
|
|
|
if (!have_addr)
|
|
return;
|
|
|
|
dump_trapframe((struct trapframe *)addr);
|
|
}
|
|
|
|
#endif /* DDB */
|