d1d3233ebd
The following systems are affected:
- MPC8555CDS
- MPC8572DS
This overhaul covers the following major changes:
- All integrated peripherals drivers for Freescale MPC85XX SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).
- This includes: LBC, PCI / PCI-Express, I2C, DS1553, OpenPIC, TSEC, SEC,
QUICC, UART, CFI.
- Thanks to the common FDT infrastrucutre (fdtbus, simplebus) we retire
ocpbus(4) driver, which was based on hard-coded config data.
Note that world for these platforms has to be built WITH_FDT.
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
97 lines
2.9 KiB
C
97 lines
2.9 KiB
C
/*-
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* Copyright (c) 2006-2008, Juniper Networks, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_LBC_H_
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#define _MACHINE_LBC_H_
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/* Maximum number of devices on Local Bus */
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#define LBC_DEV_MAX 8
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/* Local access registers */
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#define LBC85XX_BR(n) (8 * n)
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#define LBC85XX_OR(n) (4 + (8 * n))
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#define LBC85XX_LBCR (0xd0)
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#define LBC85XX_LCRR (0xd4)
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/* LBC machine select */
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#define LBCRES_MSEL_GPCM 0
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#define LBCRES_MSEL_FCM 1
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#define LBCRES_MSEL_UPMA 8
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#define LBCRES_MSEL_UPMB 9
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#define LBCRES_MSEL_UPMC 10
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/* LBC data error checking modes */
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#define LBCRES_DECC_DISABLED 0
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#define LBCRES_DECC_NORMAL 1
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#define LBCRES_DECC_RMW 2
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/* LBC atomic operation modes */
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#define LBCRES_ATOM_DISABLED 0
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#define LBCRES_ATOM_RAWA 1
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#define LBCRES_ATOM_WARA 2
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struct lbc_bank {
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u_long pa; /* physical addr of the bank */
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u_long size; /* bank size */
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vm_offset_t va; /* VA of the bank */
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/*
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* XXX the following bank attributes do not have properties specified
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* in the LBC DTS bindings yet (11.2009), so they are mainly a
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* placeholder for future extensions.
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*/
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int width; /* data bus width */
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uint8_t msel; /* machine select */
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uint8_t atom; /* atomic op mode */
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uint8_t wp; /* write protect */
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uint8_t decc; /* data error checking */
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};
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struct lbc_softc {
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device_t sc_dev;
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struct resource *sc_res;
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bus_space_handle_t sc_bsh;
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bus_space_tag_t sc_bst;
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int sc_rid;
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struct rman sc_rman;
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int sc_addr_cells;
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int sc_size_cells;
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struct lbc_bank sc_banks[LBC_DEV_MAX];
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};
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struct lbc_devinfo {
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struct ofw_bus_devinfo di_ofw;
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struct resource_list di_res;
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int di_bank;
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};
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#endif /* _MACHINE_LBC_H_ */
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