289 lines
9.1 KiB
C
289 lines
9.1 KiB
C
/*-
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* Copyright (C) 2006-2007 Semihalf
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* All rights reserved.
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*
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* Written by: Piotr Kruszynski <ppk@semihalf.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#define TSEC_RX_NUM_DESC 256
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#define TSEC_TX_NUM_DESC 256
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#define OCP_TSEC_RID_TXIRQ 0
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#define OCP_TSEC_RID_RXIRQ 1
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#define OCP_TSEC_RID_ERRIRQ 2
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struct tsec_softc {
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/* XXX MII bus requires that struct ifnet is first!!! */
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struct ifnet *tsec_ifp;
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struct mtx transmit_lock; /* transmitter lock */
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struct mtx receive_lock; /* receiver lock */
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device_t dev;
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device_t tsec_miibus;
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struct mii_data *tsec_mii; /* MII media control */
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struct callout tsec_tick_ch;
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int tsec_link;
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bus_dma_tag_t tsec_tx_dtag; /* TX descriptors tag */
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bus_dmamap_t tsec_tx_dmap; /* TX descriptors map */
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struct tsec_desc *tsec_tx_vaddr;/* vadress of TX descriptors */
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uint32_t tsec_tx_raddr; /* real adress of TX descriptors */
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bus_dma_tag_t tsec_rx_dtag; /* RX descriptors tag */
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bus_dmamap_t tsec_rx_dmap; /* RX descriptors map */
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struct tsec_desc *tsec_rx_vaddr; /* vadress of RX descriptors */
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uint32_t tsec_rx_raddr; /* real adress of RX descriptors */
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bus_dma_tag_t tsec_tx_mtag; /* TX mbufs tag */
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bus_dma_tag_t tsec_rx_mtag; /* TX mbufs tag */
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struct rx_data_type {
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bus_dmamap_t map; /* mbuf map */
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struct mbuf *mbuf;
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uint32_t paddr; /* DMA addres of buffer */
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} rx_data[TSEC_RX_NUM_DESC];
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uint32_t tx_cur_desc_cnt;
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uint32_t tx_dirty_desc_cnt;
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uint32_t rx_cur_desc_cnt;
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struct resource *sc_rres; /* register resource */
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int sc_rrid; /* register rid */
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struct {
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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} sc_bas;
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struct resource *sc_transmit_ires;
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void *sc_transmit_ihand;
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int sc_transmit_irid;
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struct resource *sc_receive_ires;
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void *sc_receive_ihand;
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int sc_receive_irid;
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struct resource *sc_error_ires;
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void *sc_error_ihand;
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int sc_error_irid;
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int tsec_if_flags;
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/* Watchdog related */
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struct callout wd_callout;
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int wd_timer;
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/* TX maps */
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bus_dmamap_t tx_map_data[TSEC_TX_NUM_DESC];
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/* unused TX maps data */
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uint32_t tx_map_unused_get_cnt;
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uint32_t tx_map_unused_put_cnt;
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bus_dmamap_t *tx_map_unused_data[TSEC_TX_NUM_DESC];
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/* used TX maps data */
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uint32_t tx_map_used_get_cnt;
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uint32_t tx_map_used_put_cnt;
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bus_dmamap_t *tx_map_used_data[TSEC_TX_NUM_DESC];
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/* mbufs in TX queue */
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uint32_t tx_mbuf_used_get_cnt;
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uint32_t tx_mbuf_used_put_cnt;
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struct mbuf *tx_mbuf_used_data[TSEC_TX_NUM_DESC];
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};
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/* interface to get/put generic objects */
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#define TSEC_CNT_INIT(cnt, wrap) ((cnt) = ((wrap) - 1))
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#define TSEC_INC(count, wrap) (count = ((count) + 1) & ((wrap) - 1))
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#define TSEC_GET_GENERIC(hand, tab, count, wrap) \
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((hand)->tab[TSEC_INC((hand)->count, wrap)])
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#define TSEC_PUT_GENERIC(hand, tab, count, wrap, val) \
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((hand)->tab[TSEC_INC((hand)->count, wrap)] = val)
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#define TSEC_BACK_GENERIC(sc, count, wrap) do { \
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if ((sc)->count > 0) \
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(sc)->count--; \
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else \
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(sc)->count = (wrap) - 1; \
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} while (0)
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/* TX maps interface */
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#define TSEC_TX_MAP_CNT_INIT(sc) do { \
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TSEC_CNT_INIT((sc)->tx_map_unused_get_cnt, TSEC_TX_NUM_DESC); \
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TSEC_CNT_INIT((sc)->tx_map_unused_put_cnt, TSEC_TX_NUM_DESC); \
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TSEC_CNT_INIT((sc)->tx_map_used_get_cnt, TSEC_TX_NUM_DESC); \
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TSEC_CNT_INIT((sc)->tx_map_used_put_cnt, TSEC_TX_NUM_DESC); \
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} while (0)
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/* interface to get/put unused TX maps */
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#define TSEC_ALLOC_TX_MAP(sc) \
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TSEC_GET_GENERIC(sc, tx_map_unused_data, tx_map_unused_get_cnt, \
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TSEC_TX_NUM_DESC)
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#define TSEC_FREE_TX_MAP(sc, val) \
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TSEC_PUT_GENERIC(sc, tx_map_unused_data, tx_map_unused_put_cnt, \
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TSEC_TX_NUM_DESC, val)
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/* interface to get/put used TX maps */
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#define TSEC_GET_TX_MAP(sc) \
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TSEC_GET_GENERIC(sc, tx_map_used_data, tx_map_used_get_cnt, \
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TSEC_TX_NUM_DESC)
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#define TSEC_PUT_TX_MAP(sc, val) \
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TSEC_PUT_GENERIC(sc, tx_map_used_data, tx_map_used_put_cnt, \
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TSEC_TX_NUM_DESC, val)
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/* interface to get/put TX mbufs in send queue */
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#define TSEC_TX_MBUF_CNT_INIT(sc) do { \
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TSEC_CNT_INIT((sc)->tx_mbuf_used_get_cnt, TSEC_TX_NUM_DESC); \
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TSEC_CNT_INIT((sc)->tx_mbuf_used_put_cnt, TSEC_TX_NUM_DESC); \
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} while (0)
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#define TSEC_GET_TX_MBUF(sc) \
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TSEC_GET_GENERIC(sc, tx_mbuf_used_data, tx_mbuf_used_get_cnt, \
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TSEC_TX_NUM_DESC)
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#define TSEC_PUT_TX_MBUF(sc, val) \
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TSEC_PUT_GENERIC(sc, tx_mbuf_used_data, tx_mbuf_used_put_cnt, \
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TSEC_TX_NUM_DESC, val)
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#define TSEC_EMPTYQ_TX_MBUF(sc) \
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((sc)->tx_mbuf_used_get_cnt == (sc)->tx_mbuf_used_put_cnt)
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/* interface for manage tx tsec_desc */
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#define TSEC_TX_DESC_CNT_INIT(sc) do { \
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TSEC_CNT_INIT((sc)->tx_cur_desc_cnt, TSEC_TX_NUM_DESC); \
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TSEC_CNT_INIT((sc)->tx_dirty_desc_cnt, TSEC_TX_NUM_DESC); \
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} while (0)
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#define TSEC_GET_CUR_TX_DESC(sc) \
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&TSEC_GET_GENERIC(sc, tsec_tx_vaddr, tx_cur_desc_cnt, \
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TSEC_TX_NUM_DESC)
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#define TSEC_GET_DIRTY_TX_DESC(sc) \
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&TSEC_GET_GENERIC(sc, tsec_tx_vaddr, tx_dirty_desc_cnt, \
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TSEC_TX_NUM_DESC)
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#define TSEC_BACK_DIRTY_TX_DESC(sc) \
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TSEC_BACK_GENERIC(sc, tx_dirty_desc_cnt, TSEC_TX_NUM_DESC)
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#define TSEC_CUR_DIFF_DIRTY_TX_DESC(sc) \
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((sc)->tx_cur_desc_cnt != (sc)->tx_dirty_desc_cnt)
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#define TSEC_FREE_TX_DESC(sc) \
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(((sc)->tx_cur_desc_cnt < (sc)->tx_dirty_desc_cnt) ? \
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((sc)->tx_dirty_desc_cnt - (sc)->tx_cur_desc_cnt - 1) \
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: \
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(TSEC_TX_NUM_DESC - (sc)->tx_cur_desc_cnt \
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+ (sc)->tx_dirty_desc_cnt - 1))
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/* interface for manage rx tsec_desc */
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#define TSEC_RX_DESC_CNT_INIT(sc) do { \
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TSEC_CNT_INIT((sc)->rx_cur_desc_cnt, TSEC_RX_NUM_DESC); \
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} while (0)
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#define TSEC_GET_CUR_RX_DESC(sc) \
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&TSEC_GET_GENERIC(sc, tsec_rx_vaddr, rx_cur_desc_cnt, \
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TSEC_RX_NUM_DESC)
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#define TSEC_BACK_CUR_RX_DESC(sc) \
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TSEC_BACK_GENERIC(sc, rx_cur_desc_cnt, TSEC_RX_NUM_DESC)
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#define TSEC_GET_CUR_RX_DESC_CNT(sc) \
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((sc)->rx_cur_desc_cnt)
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/* init all counters (for init only!) */
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#define TSEC_TX_RX_COUNTERS_INIT(sc) do { \
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TSEC_TX_MAP_CNT_INIT(sc); \
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TSEC_TX_MBUF_CNT_INIT(sc); \
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TSEC_TX_DESC_CNT_INIT(sc); \
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TSEC_RX_DESC_CNT_INIT(sc); \
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} while (0)
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/* read/write bus functions */
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#define TSEC_READ(sc, reg) \
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bus_space_read_4((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg))
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#define TSEC_WRITE(sc, reg, val) \
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bus_space_write_4((sc)->sc_bas.bst, (sc)->sc_bas.bsh, (reg), (val))
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/* Lock for transmitter */
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#define TSEC_TRANSMIT_LOCK(sc) do { \
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mtx_assert(&(sc)->receive_lock, MA_NOTOWNED); \
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mtx_lock(&(sc)->transmit_lock); \
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} while (0)
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#define TSEC_TRANSMIT_UNLOCK(sc) mtx_unlock(&(sc)->transmit_lock)
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#define TSEC_TRANSMIT_LOCK_ASSERT(sc) mtx_assert(&(sc)->transmit_lock, MA_OWNED)
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/* Lock for receiver */
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#define TSEC_RECEIVE_LOCK(sc) do { \
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mtx_assert(&(sc)->transmit_lock, MA_NOTOWNED); \
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mtx_lock(&(sc)->receive_lock); \
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} while (0)
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#define TSEC_RECEIVE_UNLOCK(sc) mtx_unlock(&(sc)->receive_lock)
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#define TSEC_RECEIVE_LOCK_ASSERT(sc) mtx_assert(&(sc)->receive_lock, MA_OWNED)
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/* Global tsec lock (with all locks) */
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#define TSEC_GLOBAL_LOCK(sc) do { \
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if ((mtx_owned(&(sc)->transmit_lock) ? 1 : 0) != \
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(mtx_owned(&(sc)->receive_lock) ? 1 : 0)) { \
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panic("tsec deadlock possibility detection!"); \
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} \
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mtx_lock(&(sc)->transmit_lock); \
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mtx_lock(&(sc)->receive_lock); \
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} while (0)
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#define TSEC_GLOBAL_UNLOCK(sc) do { \
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TSEC_RECEIVE_UNLOCK(sc); \
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TSEC_TRANSMIT_UNLOCK(sc); \
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} while (0)
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#define TSEC_GLOBAL_LOCK_ASSERT(sc) do { \
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TSEC_TRANSMIT_LOCK_ASSERT(sc); \
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TSEC_RECEIVE_LOCK_ASSERT(sc); \
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} while (0)
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/* From global to {transmit,receive} */
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#define TSEC_GLOBAL_TO_TRANSMIT_LOCK(sc) do { \
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mtx_unlock(&(sc)->receive_lock);\
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} while (0)
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#define TSEC_GLOBAL_TO_RECEIVE_LOCK(sc) do { \
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mtx_unlock(&(sc)->transmit_lock);\
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} while (0)
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struct tsec_desc {
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volatile uint16_t flags; /* descriptor flags */
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volatile uint16_t length; /* buffer length */
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volatile uint32_t bufptr; /* buffer pointer */
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};
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#define TSEC_READ_RETRY 10000
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#define TSEC_READ_DELAY 100
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