108 lines
3.5 KiB
ArmAsm
108 lines
3.5 KiB
ArmAsm
/*-
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* Copyright (c) 2001 Jake Burkholder.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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.register %g2, #ignore
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.register %g3, #ignore
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.register %g6, #ignore
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.register %g7, #ignore
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#include <machine/tstate.h>
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#include <machine/utrap.h>
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#include "assym.s"
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ENTRY(__sparc_utrap_gen)
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sub %sp, UF_SIZEOF, %sp
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stx %o0, [%sp + SPOFF + CCFSZ + UF_TYPE]
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stx %o3, [%sp + SPOFF + CCFSZ + UF_TAR]
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stx %o4, [%sp + SPOFF + CCFSZ + UF_SFAR]
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stx %o5, [%sp + SPOFF + CCFSZ + UF_SFSR]
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stx %l4, [%sp + SPOFF + CCFSZ + UF_FSR]
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stx %l5, [%sp + SPOFF + CCFSZ + UF_STATE]
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stx %l6, [%sp + SPOFF + CCFSZ + UF_PC]
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stx %l7, [%sp + SPOFF + CCFSZ + UF_NPC]
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stx %g1, [%sp + SPOFF + CCFSZ + UF_G1]
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stx %g2, [%sp + SPOFF + CCFSZ + UF_G2]
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stx %g3, [%sp + SPOFF + CCFSZ + UF_G3]
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stx %g4, [%sp + SPOFF + CCFSZ + UF_G4]
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stx %g5, [%sp + SPOFF + CCFSZ + UF_G5]
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stx %g6, [%sp + SPOFF + CCFSZ + UF_G6]
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stx %g7, [%sp + SPOFF + CCFSZ + UF_G7]
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stx %i0, [%sp + SPOFF + CCFSZ + UF_O0]
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stx %i1, [%sp + SPOFF + CCFSZ + UF_O1]
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stx %i2, [%sp + SPOFF + CCFSZ + UF_O2]
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stx %i3, [%sp + SPOFF + CCFSZ + UF_O3]
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stx %i4, [%sp + SPOFF + CCFSZ + UF_O4]
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stx %i5, [%sp + SPOFF + CCFSZ + UF_O5]
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stx %i6, [%sp + SPOFF + CCFSZ + UF_O6]
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stx %i7, [%sp + SPOFF + CCFSZ + UF_O7]
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rd %y, %l6
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call __sparc_utrap
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add %sp, SPOFF + CCFSZ, %o0
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wr %l6, 0, %y
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ldx [%sp + SPOFF + CCFSZ + UF_G1], %g1
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ldx [%sp + SPOFF + CCFSZ + UF_G2], %g2
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ldx [%sp + SPOFF + CCFSZ + UF_G3], %g3
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ldx [%sp + SPOFF + CCFSZ + UF_G4], %g4
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ldx [%sp + SPOFF + CCFSZ + UF_G5], %g5
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ldx [%sp + SPOFF + CCFSZ + UF_G6], %g6
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ldx [%sp + SPOFF + CCFSZ + UF_G7], %g7
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ldx [%sp + SPOFF + CCFSZ + UF_O0], %i0
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ldx [%sp + SPOFF + CCFSZ + UF_O1], %i1
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ldx [%sp + SPOFF + CCFSZ + UF_O2], %i2
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ldx [%sp + SPOFF + CCFSZ + UF_O3], %i3
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ldx [%sp + SPOFF + CCFSZ + UF_O4], %i4
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ldx [%sp + SPOFF + CCFSZ + UF_O5], %i5
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ldx [%sp + SPOFF + CCFSZ + UF_O6], %i6
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ldx [%sp + SPOFF + CCFSZ + UF_O7], %i7
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ldx [%sp + SPOFF + CCFSZ + UF_STATE], %l5
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! Restore %asi and %ccr from the passed tstate
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srlx %l5, TSTATE_CCR_SHIFT, %l4
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and %l4, CCR_MASK, %l4
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wr %l4, 0, %ccr
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srlx %l5, TSTATE_ASI_SHIFT, %l4
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and %l4, ASI_MASK, %l4
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wr %l4, 0, %asi
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ldx [%sp + SPOFF + CCFSZ + UF_PC], %l6
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ldx [%sp + SPOFF + CCFSZ + UF_NPC], %l7
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jmpl %l6, %g0
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return %l7
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END(__sparc_utrap_gen)
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