ca83dc2de1
Make the sound configuration a little neater (see /sys/i386/isa/sound/Readme.freebsd) Add support for the Microsoft Sound Source. Document the sound options again. Submitted by: Sujal Patel <smpatel@wam.umd.edu> Obtained from: Voxware
372 lines
10 KiB
C
372 lines
10 KiB
C
/******************************************************************************
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def.h
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Version 1.3 11/2/93
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Copyright (c) 1993 Analog Devices Inc. All rights reserved
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******************************************************************************/
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/* Port offsets from base port for Sound Blaster DSP */
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#define DSP_PORT_CMSD0 0x00 /* C/MS music voice 1-6 data port, write only */
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#define DSP_PORT_CMSR0 0x01 /* C/MS music voice 1-6 register port, write only */
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#define DSP_PORT_CMSD1 0x02 /* C/MS music voice 7-12 data port, write only */
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#define DSP_PORT_CMSR1 0x03 /* C/MS music voice 7-12 register port, write only */
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#define DSP_PORT_STATUS 0x04 /* DSP Status bits, read only */
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#define DSP_PORT_CONTROL 0x04 /* DSP Control bits, write only */
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#define DSP_PORT_DATA_LSB 0x05 /* Read or write LSB of 16 bit data */
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#define DSP_PORT_RESET 0x06 /* DSP Reset, write only */
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#define DSP_PORT_07h 0x07 /* reserved port */
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#define DSP_PORT_FMD0 0x08 /* FM music data/status port, read/write */
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#define DSP_PORT_FMR0 0x09 /* FM music data/status port, write only */
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#define DSP_PORT_RDDATA 0x0A /* DSP Read data, read only reading signals DSP */
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#define DSP_PORT_0Bh 0x0B /* reserved port */
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#define DSP_PORT_WRDATA 0x0C /* DSP Write data or command, write */
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#define DSP_PORT_WRBUSY 0x0C /* DSP Write buffer status (bit 7), read */
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#define DSP_PORT_0Dh 0x0D /* reserved port */
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#define DSP_PORT_DATAAVAIL 0x0E /* DSP Data available status (bit 7), read only */
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#define DSP_PORT_INTERFACE 0x0E /* Sets DMA Channel and Interrupt, write only */
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#define DSP_PORT_0Fh 0x0F /* reserved port (used on Pro cards) */
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#define ADDR_MASK 0x003f
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#define INT_MASK 0xffc7
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#define INT_3_BITS 0x0008
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#define INT_5_BITS 0x0010
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#define INT_7_BITS 0x0018
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#define INT_9_BITS 0x0020
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#define INT_10_BITS 0x0028
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#define INT_11_BITS 0x0030
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#define INT_12_BITS 0x0038
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#define GAME_BIT 0x0400
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#define GAME_BIT_MASK 0xfbff
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#define INT_TEST_BIT 0x0200
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#define INT_TEST_PASS 0x0100
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#define INT_TEST_BIT_MASK 0xFDFF
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#define DMA_MASK 0xfff8
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#define DMA_0_BITS 0x0001
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#define DMA_1_BITS 0x0002
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#define DMA_3_BITS 0x0003
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#define DMA_5_BITS 0x0004
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#define DMA_6_BITS 0x0005
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#define DMA_7_BITS 0x0006
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#define DMA_TEST_BIT 0x0080
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#define DMA_TEST_PASS 0x0040
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#define DMA_TEST_BIT_MASK 0xFF7F
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/* Echo DSP Flags */
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#define DSP_FLAG3 0x10
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#define DSP_FLAG2 0x08
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#define DSP_FLAG1 0x80
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#define DSP_FLAG0 0x40
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#define PSS_CONFIG 0x10
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#define PSS_WSS_CONFIG 0x12
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#define SB_CONFIG 0x14
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#define MIDI_CONFIG 0x18
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#define CD_CONFIG 0x16
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#define UART_CONFIG 0x1a
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#define PSS_DATA 0x00
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#define PSS_STATUS 0x02
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#define PSS_CONTROL 0x02
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#define PSS_ID_VERS 0x04
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#define PSS_FLAG3 0x0800
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#define PSS_FLAG2 0x0400
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#define PSS_FLAG1 0x1000
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#define PSS_FLAG0 0x0800
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/*_____ WSS defines */
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#define WSS_BASE_ADDRESS 0x530
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#define WSS_CONFIG 0x0
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#define WSS_VERSION 0x03
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#define WSS_SP0 0x04
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#define WSS_SP1 0x05
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#define WSS_SP2 0x06
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#define WSS_SP3 0x07
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/*_____ SoundPort register addresses */
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#define SP_LIN_SOURCE_CTRL 0x00
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#define SP_RIN_SOURCE_CTRL 0x01
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#define SP_LIN_GAIN_CTRL 0x10
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#define SP_RIN_GAIN_CTRL 0x11
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#define SP_LAUX1_CTRL 0x02
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#define SP_RAUX1_CTRL 0x03
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#define SP_LAUX2_CTRL 0x04
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#define SP_RAUX2_CTRL 0x05
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#define SP_LOUT_CTRL 0x06
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#define SP_ROUT_CTRL 0x07
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#define SP_CLK_FORMAT 0x48
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#define SP_INT_CONF 0x09
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#define SP_INT_CONF_MCE 0x49
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#define SP_PIN_CTRL 0x0a
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#define SP_TEST_INIT 0x0b
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#define SP_MISC_CTRL 0x0c
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#define SP_MIX_CTRL 0x0d
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#define SP_DMA_UCNT 0x0e
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#define SP_DMA_LCNT 0x0f
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/*_____ Gain constants */
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#define GAIN_0 0x00
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#define GAIN_1_5 0x01
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#define GAIN_3 0x02
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#define GAIN_4_5 0x03
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#define GAIN_6 0x04
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#define GAIN_7_5 0x05
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#define GAIN_9 0x06
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#define GAIN_10_5 0x07
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#define GAIN_12 0x08
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#define GAIN_13_5 0x09
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#define GAIN_15 0x0a
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#define GAIN_16_5 0x0b
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#define GAIN_18 0x0c
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#define GAIN_19_5 0x0d
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#define GAIN_21 0x0e
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#define GAIN_22_5 0x0f
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#define MUTE 0XFFFF
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/*_____ Attenuation constants */
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#define ATTEN_0 0x00
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#define ATTEN_1_5 0x01
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#define ATTEN_3 0x02
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#define ATTEN_4_5 0x03
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#define ATTEN_6 0x04
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#define ATTEN_7_5 0x05
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#define ATTEN_9 0x06
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#define ATTEN_10_5 0x07
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#define ATTEN_12 0x08
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#define ATTEN_13_5 0x09
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#define ATTEN_15 0x0a
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#define ATTEN_16_5 0x0b
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#define ATTEN_18 0x0c
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#define ATTEN_19_5 0x0d
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#define ATTEN_21 0x0e
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#define ATTEN_22_5 0x0f
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#define PSS_WRITE_EMPTY 0x8000
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#define CD_POL_MASK 0xFFBF
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#define CD_POL_BIT 0x0040
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/******************************************************************************
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host.h
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Version 1.2 9/27/93
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Copyright (c) 1993 Analog Devices Inc. All rights reserved
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******************************************************************************/
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#define SB_WRITE_FULL 0x80
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#define SB_READ_FULL 0x80
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#define SB_WRITE_STATUS 0x0C
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#define SB_READ_STATUS 0x0E
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#define SB_READ_DATA 0x0A
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#define SB_WRITE_DATA 0x0C
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#define PSS_DATA_REG 0x00
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#define PSS_STATUS_REG 0x02
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#define PSS_WRITE_EMPTY 0x8000
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#define PSS_READ_FULL 0x4000
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/*_____ 1848 Sound Port bit defines */
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#define SP_IN_INIT 0x80
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#define MODE_CHANGE_ENABLE 0x40
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#define MODE_CHANGE_MASK 0xbf
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#define TRANSFER_DISABLE 0x20
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#define TRANSFER_DISABLE_MASK 0xdf
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#define ADDRESS_MASK 0xf0
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/*_____ Status bits */
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#define INTERRUPT_STATUS 0x01
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#define PLAYBACK_READY 0x02
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#define PLAYBACK_LEFT 0x04
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/*_____ pbright is not left */
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#define PLAYBACK_UPPER 0x08
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/*_____ bplower is not upper */
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#define SAMPLE_OVERRUN 0x10
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#define SAMPLE_UNDERRUN 0x10
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#define CAPTURE_READY 0x20
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#define CAPTURE_LEFT 0x40
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/*_____ cpright is not left */
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#define CAPTURE_UPPER 0x08
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/*_____ cplower is not upper */
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/*_____ Input & Output regs bits */
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#define LINE_INPUT 0x80
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#define AUX_INPUT 0x40
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#define MIC_INPUT 0x80
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#define MIXED_DAC_INPUT 0xC0
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#define INPUT_GAIN_MASK 0xf0
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#define INPUT_MIC_GAIN_ENABLE 0x20
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#define INPUT_MIC_GAIN_MASK 0xdf
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#define INPUT_SOURCE_MASK 0x3f
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#define AUX_INPUT_ATTEN_MASK 0xf0
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#define AUX_INPUT_MUTE 0x80
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#define AUX_INPUT_MUTE_MASK 0x7f
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#define OUTPUT_MUTE 0x80
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#define OUTPUT_MUTE_MASK 0x7f
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#define OUTPUT_ATTEN_MASK 0xc0
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/*_____ Clock and Data format reg bits */
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#define CLOCK_SELECT_MASK 0xfe
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#define CLOCK_XTAL2 0x01
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#define CLOCK_XTAL1 0x00
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#define CLOCK_FREQ_MASK 0xf1
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#define STEREO_MONO_MASK 0xef
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#define STEREO 0x10
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#define AUDIO_MONO 0x00
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#define LINEAR_COMP_MASK 0xdf
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#define LINEAR 0x00
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#define COMPANDED 0x20
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#define FORMAT_MASK 0xbf
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#define PCM 0x00
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#define ULAW 0x00
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#define TWOS_COMP 0x40
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#define ALAW 0x40
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/*_____ Interface Configuration reg bits */
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#define PLAYBACK_ENABLE 0x01
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#define PLAYBACK_ENABLE_MASK 0xfe
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#define CAPTURE_ENABLE 0x02
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#define CAPTURE_ENABLE_MASK 0xfd
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#define SINGLE_DMA 0x04
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#define SINGLE_DMA_MASK 0xfb
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#define DUAL_DMA 0x00
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#define AUTO_CAL_ENABLE 0x08
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#define AUTO_CAL_DISABLE_MASK 0xf7
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#define PLAYBACK_PIO_ENABLE 0x40
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#define PLAYBACK_DMA_MASK 0xbf
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#define CAPTURE_PIO_ENABLE 0x80
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#define CAPTURE_DMA_MASK 0x7f
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/*_____ Pin control bits */
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#define INTERRUPT_ENABLE 0x02
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#define INTERRUPT_MASK 0xfd
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/*_____ Test and init reg bits */
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#define OVERRANGE_LEFT_MASK 0xfc
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#define OVERRANGE_RIGHT_MASK 0xf3
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#define DATA_REQUEST_STATUS 0x10
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#define AUTO_CAL_IN_PROG 0x20
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#define PLAYBACK_UNDERRUN 0x40
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#define CAPTURE_UNDERRUN 0x80
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/*_____ Miscellaneous Control reg bits */
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#define ID_MASK 0xf0
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/*_____ Digital Mix Control reg bits */
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#define DIGITAL_MIX1_MUTE_MASK 0xfe
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#define MIX_ATTEN_MASK 0x03
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/*_____ 1848 Sound Port reg defines */
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#define SP_LEFT_INPUT_CONTROL 0x0
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#define SP_RIGHT_INPUT_CONTROL 0x1
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#define SP_LEFT_AUX1_CONTROL 0x2
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#define SP_RIGHT_AUX1_CONTROL 0x3
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#define SP_LEFT_AUX2_CONTROL 0x4
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#define SP_RIGHT_AUX2_CONTROL 0x5
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#define SP_LEFT_OUTPUT_CONTROL 0x6
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#define SP_RIGHT_OUTPUT_CONTROL 0x7
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#define SP_CLOCK_DATA_FORMAT 0x8
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#define SP_INTERFACE_CONFIG 0x9
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#define SP_PIN_CONTROL 0xA
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#define SP_TEST_AND_INIT 0xB
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#define SP_MISC_INFO 0xC
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#define SP_DIGITAL_MIX 0xD
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#define SP_UPPER_BASE_COUNT 0xE
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#define SP_LOWER_BASE_COUNT 0xF
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#define HOST_SP_ADDR (0x534)
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#define HOST_SP_DATA (0x535)
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/******************************************************************************
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phillips.h
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Version 1.2 9/27/93
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Copyright (c) 1993 Analog Devices Inc. All rights reserved
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******************************************************************************/
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/*_____ Phillips control SW defines */
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/*_____ Settings and ranges */
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#define VOLUME_MAX 6
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#define VOLUME_MIN (-64)
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#define VOLUME_RANGE 70
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#define VOLUME_STEP 2
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#define BASS_MAX 15
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#define BASS_MIN (-12)
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#define BASS_STEP 2
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#define BASS_RANGE 27
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#define TREBLE_MAX 12
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#define TREBLE_MIN (-12)
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#define TREBLE_STEP 2
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#define TREBLE_RANGE 24
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#define VOLUME_CONSTANT 252
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#define BASS_CONSTANT 246
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#define TREBLE_CONSTANT 246
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/*_____ Software commands */
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#define SET_MASTER_COMMAND 0x0010
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#define MASTER_VOLUME_LEFT 0x0000
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#define MASTER_VOLUME_RIGHT 0x0100
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#define MASTER_BASS 0x0200
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#define MASTER_TREBLE 0x0300
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#define MASTER_SWITCH 0x0800
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#define STEREO_MODE 0x00ce
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#define PSEUDO_MODE 0x00d6
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#define SPATIAL_MODE 0x00de
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#define MONO_MODE 0x00c6
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#define PSS_STEREO 0x00ce
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#define PSS_PSEUDO 0x00d6
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#define PSS_SPATIAL 0x00de
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#define PSS_MONO 0x00c6
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#define PHILLIPS_VOL_MIN -64
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#define PHILLIPS_VOL_MAX 6
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#define PHILLIPS_VOL_DELTA 70
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#define PHILLIPS_VOL_INITIAL -20
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#define PHILLIPS_VOL_CONSTANT 252
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#define PHILLIPS_VOL_STEP 2
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#define PHILLIPS_BASS_MIN -12
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#define PHILLIPS_BASS_MAX 15
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#define PHILLIPS_BASS_DELTA 27
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#define PHILLIPS_BASS_INITIAL 0
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#define PHILLIPS_BASS_CONSTANT 246
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#define PHILLIPS_BASS_STEP 2
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#define PHILLIPS_TREBLE_MIN -12
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#define PHILLIPS_TREBLE_MAX 12
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#define PHILLIPS_TREBLE_DELTA 24
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#define PHILLIPS_TREBLE_INITIAL 0
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#define PHILLIPS_TREBLE_CONSTANT 246
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#define PHILLIPS_TREBLE_STEP 2
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