19c749625f
ISDN4BSD is the work of our brand-new comitter: Hellmuth Michaelis, who has done a tremendous amount of work to bring us this far. There are still some outstanding issues and files to bring into the tree, and for now it will be needed to pick up all the extra docs from the isdn4bsd release. It is probably also a very good idea to subscribe to the isdn@freebsd.org mailing list before you try this out. These files correspond to release "beta Version 0.70.00 / December 1998" from Hellmuth.
139 lines
6.2 KiB
C
139 lines
6.2 KiB
C
/*
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* Copyright (c) 1994, 1998 Hellmuth Michaelis. All rights reserved.
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*
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* Based on code written by Stollmann GmbH, Hamburg. Many thanks to
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* Christian Luehrs and Manfred Jung for docs, sources and answers!
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_tina_ioctl.h - i4b Stollman Tina-dd ioctl header file
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* ---------------------------------------------------------
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*
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* $Id: i4b_tina_ioctl.h,v 1.2 1998/12/05 18:06:20 hm Exp $
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*
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* last edit-date: [Sat Dec 5 18:41:51 1998]
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*
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*---------------------------------------------------------------------------*/
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#ifndef _I4B_TINA_IOCTL_H_
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#define _I4B_TINA_IOCTL_H_
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#define TINA_IOSIZE 8 /* 8 byte wide iospace occupied */
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/*---------------------------------------------------------------------------*
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* register offsets in i/o address space
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*---------------------------------------------------------------------------*/
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#define CTRL_STAT 0 /* control & status */
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#define ADDR_CNTL 1 /* address pointer low */
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#define ADDR_CNTM 2 /* address pointer mid */
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#define ADDR_CNTH 3 /* address pointer high */
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#define DATA_LOW 4 /* data register low */
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#define DATA_HIGH 5 /* data register high */
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#define DATA_LOW_INC 6 /* data register low, post inc */
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#define DATA_HIGH_INC 7 /* data register high, post inc */
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/*---------------------------------------------------------------------------*
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* status register (CTRL_STAT read access)
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*---------------------------------------------------------------------------*/
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#define CR_INTC 0x80 /* irq FROM tina-dd TO pc active */
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#define CR_INTP 0x40 /* irq FROM pc TO tina-dd active */
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#define CR_INTPA 0x20 /* irq FROM pc TO tina-dd active */
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#define CR_NMI 0x10 /* nmi FROM PC TO tina-dd active */
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#define CR_FLASHLD 0x08 /* read of the FLASHLD-bit (n/c) */
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#define CR_S2C 0x04 /* info bit */
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#define CR_S1C 0x02 /* info bit */
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#define CR_S0C 0x01 /* info bit */
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/*---------------------------------------------------------------------------*
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* control register (CTRL_STAT write access)
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*---------------------------------------------------------------------------*/
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#define CR_CLR_INTC 0x80 /* clear irq on tina-dd */
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#define CR_SET_INTP 0x40 /* trigger irq on tina-dd */
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#define CR_RESET 0x20 /* reset tina-dd */
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#define CR_SET_NMI 0x10 /* trigger nmi on tina-dd */
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#define CR_SET_FLASHLD 0x08 /* activates pin FLASHLD (n/c) */
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#define CR_S2P 0x04 /* info bit (not readable !) */
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#define CR_S1P 0x02 /* info bit (not readable !) */
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#define CR_S0P 0x01 /* info bit (not readable !) */
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/*---------------------------------------------------------------------------*
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* misc definitions in dual-ported mem on board of tina-dd
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*---------------------------------------------------------------------------*/
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#define FW_SYSCB 0x200 /* address of FW SYSCB / MJ 300392 */
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#define FW_SINFO_NAME 0x220 /* address of general info label */
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#define FW_HW_TYPE 0x224 /* address of hardware type byte: */
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#define FW_HW_UNDEF 0x00 /* undefined .. */
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#define FW_HW_TINA_DD 0x10 /* TINA-dd */
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#define FW_HW_TINA_DS 0x20 /* TINA-ds (B channel/ser ?) */
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#define FW_HW_TINA_D 0x30 /* TINA-d (one B channel ?) */
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#define FW_HW_TINA_DDM 0x40 /* TINA-dd with fax module */
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#define FW_HW_TINA_DDS 0x50 /* TINA-dd with fax/voice module */
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#define FW_HW_SICCE 0x80 /* X.25 board */
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#define FW_HW_ASIC 0x01 /* ASIC version bit */
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#define FW_STAT 0x228 /* address of firmware status byte */
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#define FW_READY 0x20 /* firmware ready bit */
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#define FW_BOOTPRM_RDY 0x02 /* boot PROM ready */
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#define FW_UNDEF_0 0x00 /* undefined */
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#define FW_UNDEF_1 0xFF /* undefined */
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#define FW_SINFO_ID "SYSI" /* general info label for FW > 2.13*/
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#define FW_SINFO_ID_LEN 4
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#define FW_ADDR_PROFPTR 0x260 /* addr of ptr to board profile */
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/*===========================================================================*
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* Layer 0 - Hardware layer
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*===========================================================================*/
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/* control and status register access */
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#define ISDN_GETCSR _IOR('I', 1, unsigned char) /* get csr */
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#define ISDN_SETCSR _IOW('I', 2, unsigned char) /* set csr */
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/* dual ported ram access */
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#define ISDN_GETBLK _IOWR('I', 3, struct record) /* get dpr record */
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#define ISDN_SETBLK _IOW('I', 4, struct record) /* set dpr record */
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/*---------------------------------------------------------------------------*
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* record structure for dual ported ram block rd/wr
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*---------------------------------------------------------------------------*/
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struct record {
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unsigned int length; /* length of data block */
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unsigned int addr; /* address of mem on tina-dd board */
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unsigned char *data; /* pointer to the datablock itself */
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};
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#endif /* _I4B_TINA_IOCTL_H_ */
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